MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 108
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Cache
For instruction fetches, the fill buffer can also be used as temporary storage for line-sized bursts of
non-cacheable references under control of CACR[CEIB]. With this bit set, a non-cacheable instruction
fetch is processed, as defined by
references can hit in the buffer, but the data is never loaded into the memory array.
Table 4-7
4-10
shows the relationship between CACR bits CENB and CEIB and the type of instruction fetch.
[CENB]
CACR
0
0
1
1
1
[CEIB]
CACR
Table 4-7. Instruction Cache Operation as Defined by CACR
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
X
0
1
0
1
Instruction Fetch
Non-cacheable
Non-cacheable
Table
Cacheable
Type of
N/A
N/A
4-7. For this condition, the line-fill buffer is loaded and subsequent
Cache is completely disabled; all instruction fetches
are word or longword in size.
All instruction fetches are word or longword in size
Fetch size is defined by
line-fill buffer can be written into the memory array
All instruction fetches are word or longword in size,
and not loaded into the line-fill buffer
Instruction fetch size is defined by
loaded into the line-fill buffer, but are never written into
the memory array.
Description
Table 4-6
and contents of the
Table 4-6
Freescale Semiconductor
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