MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 665

• Manufacturer Part Number: MCF5282CVF80J
• Description: IC MPU 512K FLASH 256MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5282CVF80J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 150
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Processor Series: MCF528x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5282-KIT
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Chapter 31
IEEE 1149.1 Test Access Port (JTAG)
The Joint Test Action Group, or JTAG, is a dedicated user-accessible test logic, that complies with the
IEEE 1149.1 standard for boundary-scan testability, to help with system diagnostic and manufacturing
testing.
This architecture provides access to all data and chip control pins from the board-edge connector through
the standard four-pin test access port (TAP) and the JTAG reset pin, TRST.
Figure 31-1
Freescale Semiconductor
TRST/DSCLK
TMS/BKPT
JTAG_EN
TDI/DSI
TCLK
shows the block diagram of the JTAG module.
JTAG Module
147
31
6
2
3
148-BIT BOUNDARY SCAN REGISTER
7-BIT JTAG_CFM_CLKDIV REGISTER
4-BIT TAP INSTRUCTION DECODER
4-BIT TAP INSTRUCTION REGISTER
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
1-BIT BYPASS REGISTER
3-BIT TEST_CTRL REGISTER
32-BIT IDCODE REGISTER
TAP CONTROLLER
Figure 31-1. JTAG Block Diagram
to Debug Module
Disable DSCLK
Force BKPT = 1
0
0
0
0
0
DSI
= 0
DSO
DSI
BKPT
DSCLK
0
1
1
0
TDO/DSO
31-1