MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 496

• Manufacturer Part Number: MCF5282CVF80J
• Description: IC MPU 512K FLASH 256MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5282CVF80J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 150
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Processor Series: MCF528x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5282-KIT
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

FlexCAN
Table 25-17
25-26
15–14
Bits
Address
13
12
11
10
9
Reset
Reset
Field
Field
R/W
R/W
describes the ESTAT fields.
FORMERR Message format error. The FORMERR bit indicates whether or not the message format of
STUFERR Bit stuff error. The STUFFERR bit indicates whether or not the bit stuffing that occurred in
CRCERR
TXWARN
ACKERR
BITERR
Name
IDLE
15
7
BITERR
Transmit bit error. The BITERR[1:0] field is used to indicate when a transmit bit error occurs.
00 No transmit bit error
01 At least one bit sent as dominant was received as recessive
10 At least one bit sent as recessive was received as dominant
11 Reserved
NOTE: The transmit bit error field is not modified during the arbitration field or the ACK slot
bit time of a message, or by a transmitter that detects dominant bits while sending a passive
error frame.
Acknowledge error. The ACKERR bit indicates whether an acknowledgment has been
correctly received for a transmitted message.
0 No ACK error was detected since the last read of this register.
1 An ACK error was detected since the last read of this register.
Cyclic redundancy check error. The CRCERR bit indicates whether or not the CRC of the
last transmitted or received message was valid.
0 No CRC error was detected since the last read of this register.
1 A CRC error was detected since the last read of this register.
the last transmitted or received message was correct.
0 No format error was detected since the last read of this register.
1 A format error was detected since the last read of this register.
the last transmitted or received message was correct.
0 No bit stuffing error was detected since the last read of this register.
1 A bit stuffing error was detected since the last read of this register.
Transmit error status flag. The TXWARN status flag reflects the status of the FlexCAN
transmit error counter.
0 Transmit error counter < 96.
1 Transmit error counter ≥ 96.
Figure 25-13. FlexCAN Error and Status Register (ESTAT)
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
TX/RX
14
6
Table 25-17. ESTAT Field Descriptions
ACKERR
13
R
5
FCS
CRCERR
IPSBAR + 0x1C_0020
12
4
0000_0000
0000_0000
Description
R
FORMERR STUFFERR TXWARN
—
11
3
BOFFINT
10
2
ERRINT
R/W
Freescale Semiconductor
9
1
WAKEINT
RXWARN
8
0