MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 395
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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21.2
The timer module registers, shown in
21.2.1
The DTMRn registers program the prescaler and various timer modes.
Freescale Semiconductor
IPSBAR Offset
IPSBAR
DMA Timer 0
DMA Timer 1
DMA Timer 2
DMA Timer 3
0x00_04CC
Offset:
0x00_04C0
0x00_04C2
0x00_04C3
0x00_04C4
0x00_04C8
0x00_040C
0x00_044C
0x00_048C
0x00_0400
0x00_0440
0x00_0480
0x00_0402
0x00_0442
0x00_0482
0x00_0403
0x00_0443
0x00_0483
0x00_0404
0x00_0444
0x00_0484
0x00_0408
0x00_0448
0x00_0488
Reset
W
R
0x00_0400 (DTMR0)
0x00_0440 (DTMR1)
0x00_0480 (DTMR2)
0x00_04C0 (DTMR3)
Memory Map/Register Definition
15
0
DMA Timer Mode Registers (DTMRn)
DMA Timer n Mode Register (DTMRn)
DMA Timer n Extended Mode Register (DTXMRn)
DMA Timer n Event Register (DTERn)
DMA Timer n Reference Register (DTRRn)
DMA Timer n Capture Register (DTCRn)
DMA Timer n Counter Register (DTCNn)
14
0
13
0
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
12
0
Table 21-1. DMA Timer Module Memory Map
PS
11
0
Register
Figure 21-2. DTMRn Registers
Table
10
0
21-1, can be modified at any time.
0
9
0
8
0
7
CE
Width
(bits)
0
6
32
32
32
16
8
8
OM
Access
0
5
R/W
R/W
R/W
R/W
R/W
R
ORRI FRR
4
0
0xFFFF_FFFF
0x0000_0000
0x0000_0000
Reset Value
0x0000
DMA Timers (DTIM0–DTIM3)
0x00
0x00
0
3
Access: User read/write
0
2
CLK
Section/Page
21.2.1/21-3
21.2.2/21-5
21.2.3/21-5
21.2.4/21-7
21.2.5/21-7
21.2.6/21-8
0
1
RST
21-3
0
0
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