MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 478
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MCF5282CVF80J
Manufacturer Part Number
MCF5282CVF80J
Description
IC MPU 512K FLASH 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5282CVF80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5282CVF80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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FlexCAN
25.4
The FlexCAN module is flexible in that each one of its 16 message buffers (MBs) can be assigned either
as a transmit buffer or a receive buffer. Each MB, which is up to 8 bytes long, is also assigned an interrupt
flag bit that indicates successful completion of either transmission or reception.
25.4.1
The CPU prepares or changes an MB for transmission by executing the following steps:
25-8
•
•
Writing the Control/Status word to hold Tx MB inactive (code = 1000).
Writing the ID_HIGH and ID_LOW words.
Functional Overview
Transmit Process
Note that for both processes, the first CPU action in preparing a MB should
be to deactivate it by setting its code field to the proper value. This
requirement is mandatory to assure proper operation.
FlexCAN Base
Address Offset
Message Buffers
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
0x80-0x8F
0x16E
0x17E
0x170
0xAE
0x8C
0x8E
0x9E
0xA0
0xB0
0x82
0x84
0x86
0x90
Figure 25-5. FlexCAN Memory Map
8 bytes Data field
Control/Status
Reserved
ID_HIGH
ID_LOW
NOTE
Message Buffer 0
Message Buffer 15
Message Buffer 1
Message Buffer 2
Message Buffer 3
through
Message Buffer 14
Freescale Semiconductor
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