UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 175
UPD78F0537DGA(T)-9EV-A
Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0537DGA(T)-9EV-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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6.6.9 Conditions before clock oscillation is stopped
conditions before the clock oscillation is stopped.
Internal high-speed
oscillation clock
X1 clock
External main system clock
XT1 clock
External subsystem clock
Caution When switching the internal high-speed oscillation clock to the high-speed system clock, bit 2
Remarks 1. The number of clocks listed in Table 6-8 is the number of main system clocks before switchover.
The following lists the register flag settings for stopping the clock oscillation (disabling external clock input) and
Clock
(XSEL) of MCM must be set to 1 in advance. The value of XSEL can be changed only once after a
reset release.
2. Calculate the number of clocks in Table 6-8 by removing the decimal portion.
Set Value Before Switchover
Table 6-9. Conditions Before the Clock Oscillation Is Stopped and Flag Settings
Example When switching the main system clock from the internal high-speed oscillation clock to the
Table 6-8. Maximum Time Required for Main System Clock Switchover
MCM0
0
1
high-speed system clock (@ oscillation with f
MCS = 1 or CLS = 1
(The CPU is operating on a clock other than the internal high-speed
oscillation clock)
MCS = 0 or CLS = 1
(The CPU is operating on a clock other than the high-speed system clock)
CLS = 0
(The CPU is operating on a clock other than the subsystem clock)
1 + 2f
RH
/f
XH
Conditions Before Clock Oscillation Is Stopped
= 1 + 2 × 8/10 = 1 + 2 × 0.8 = 1 + 1.6 = 2.6 → 2 clocks
CHAPTER 6 CLOCK GENERATOR
1 + 2f
User’s Manual U17260EJ6V0UD
(External Clock Input Disabled)
XH
/f
RH
clock
0
Set Value After Switchover
MCM0
RH
= 8 MHz, f
1 + 2f
RH
/f
XH
XH
clock
= 10 MHz)
1
RSTOP = 1
MSTOP = 1
OSCSELS = 0
Flag Settings of SFR
Register
175
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