UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 386

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
(2) Generation of serial clock
386
A serial clock to be generated can be specified by using clock selection register 6 (CKSR6) and baud rate
generator control register 6 (BRGC6).
The clock to be input to the 8-bit counter can be set by bits 3 to 0 (TPS63 to TPS60) of CKSR6 and the division
value (f
Remark POWER6: Bit 7 of asynchronous serial interface operation mode register 6 (ASIM6)
XCLK6
event counter
8-bit timer/
/4 to f
50 output
f
PRS
f
f
f
f
f
f
f
f
TXE6:
RXE6:
CKSR6:
BRGC6:
PRS
PRS
PRS
PRS
PRS
PRS
PRS
PRS
f
PRS
/2
f
XCLK6
PRS
/2
/2
/2
/2
/2
/2
/2
/2
/2
10
2
3
4
5
6
7
8
9
CKSR6: TPS63 to TPS60
/255) of the 8-bit counter can be set by bits 7 to 0 (MDL67 to MDL60) of BRGC6.
Figure 15-24. Configuration of Baud Rate Generator
Bit 6 of ASIM6
Bit 5 of ASIM6
Clock selection register 6
Baud rate generator control register 6
POWER6
Selector
CHAPTER 15 SERIAL INTERFACE UART6
User’s Manual U17260EJ6V0UD
f
XCLK6
POWER6, TXE6 (or RXE6)
BRGC6: MDL67 to MDL60
Match detector
8-bit counter
Baud rate generator
1/2
Baud rate

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