UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 309
UPD78F0537DGA(T)-9EV-A
Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0537DGA(T)-9EV-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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<R>
Notes 1.
Address: FF40H
Symbol
CKS
2.
3.
If the peripheral hardware clock (f
f
• V
• V
• V
If the peripheral hardware clock operates on the internal high-speed oscillation clock when 1.8 V ≤ V
< 2.7 V, setting CCS3 = CCS2 = CCS1 = CCS0 = 0 (output clock of PCL: f
The PCL output clock prohibits settings if they exceed 10 MHz.
PRS
DD
DD
DD
BZOE
BZOE
CLOE
operating frequency varies depending on the supply voltage.
BCS1
CCS3
<7>
0
1
0
0
1
1
0
1
0
0
0
0
0
0
0
0
1
= 4.0 to 5.5 V: f
= 2.7 to 4.0 V: f
= 1.8 to 2.7 V: f
After reset: 00H
Figure 12-2. Format of Clock Output Selection Register (CKS)
CHAPTER 12 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
Clock division circuit operation stopped. BUZ fixed to low level.
Clock division circuit operation enabled. BUZ output enabled.
Clock division circuit operation stopped. PCL fixed to low level.
Clock division circuit operation enabled. PCL output enabled.
BCS1
BCS0
CCS2
Other than above
6
0
1
0
1
0
0
0
0
1
1
1
1
0
PRS
PRS
PRS
R/W
≤ 20 MHz
≤ 10 MHz
≤ 5 MHz (Standard and (A) grade products only)
f
f
f
f
PRS
PRS
PRS
PRS
BCS0
CCS1
/2
/2
/2
/2
User’s Manual U17260EJ6V0UD
5
0
0
1
1
0
0
1
1
0
10
11
12
13
PRS
) operates on the high-speed system clock (f
BUZ output enable/disable specification
PCL output enable/disable specification
CLOE
CCS0
<4>
0
1
0
1
0
1
0
1
0
BUZ output clock selection
9.77 kHz
4.88 kHz
2.44 kHz
1.22 kHz
f
f
f
f
f
f
f
f
f
Setting prohibited
PRS
PRS
PRS
PRS
PRS
PRS
PRS
SUB
PRS
CCS3
Note 2
/2
/2
/2
/2
/2
/2
/2
3
2
3
4
5
6
7
f
PRS
32.768 kHz
= 10 MHz
32.768 kHz
PCL output clock selection
f
SUB
−
CCS2
=
2
10 MHz
5 MHz
2.5 MHz
1.25 MHz
625 kHz
312.5 kHz
156.25 kHz
78.125 kHz
10 MHz
PRS
19.54 kHz
9.77 kHz
4.88 kHz
2.44 kHz
f
PRS
CCS1
) is prohibited.
=
1
f
PRS
XH
= 20 MHz
−
Note 1
) (XSEL = 1), the
10 MHz
5 MHz
2.5 MHz
1.25 MHz
625 kHz
312.5 kHz
156.25 kHz
Setting
prohibited
20 MHz
f
CCS0
PRS
0
=
Note 3
309
DD
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