UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 455
UPD78F0537DGA(T)-9EV-A
Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0537DGA(T)-9EV-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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Remarks 1. Conform to the specifications of the product that is communicating, with respect to the transmission
2. To use the device as a master in a multi-master system, read the MSTS0 bit each time interrupt
3. To use the device as a slave in a multi-master system, check the status by using the IICS0 and IICF0
No
No
and reception formats.
INTIIC0 has occurred to check the arbitration result.
registers each time interrupt INTIIC0 has occurred, and determine the processing to be performed
next.
EXC0 = 1 or COI0 = 1?
interrupt occurs?
interrupt occurs?
Slave operation
Transfer end?
MSTS0 = 1?
ACKD0 = 1?
MSTS0 = 1?
ACKD0 = 1?
Writing IIC0
Writing IIC0
TRC0 = 1?
WTIM0 = 1
STT0 = 1
Restart?
INTIIC0
INTIIC0
Figure 17-24. Master Operation in Multi-Master System (3/3)
C
C
2
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
CHAPTER 17 SERIAL INTERFACE IIC0
Starts communication
(specifies an address and transfer direction).
Starts transmission.
Waits for detection of ACK.
Waits for data transmission.
Does not participate
in communication.
User’s Manual U17260EJ6V0UD
SPT0 = 1
END
2
2
1
WTIM0 = WREL0 = 1
interrupt occurs?
interrupt occurs?
Transfer end?
MSTS0 = 1?
Reading IIC0
MSTS0 = 1?
WREL0 = 1
ACKE0 = 1
WTIM0 = 0
ACKE0 = 0
INTIIC0
INTIIC0
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
Starts reception.
Waits for data reception.
Waits for detection of ACK.
2
2
455
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