UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 752

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

E.1 Major Revisions in This Edition
752
Throughout
CHAPTER 2 PIN FUNCTIONS
p. 39
p. 41
CHAPTER 3 CPU ARCHITECTURE
p. 81
CHAPTER 4 MEMORY BANK SELECT FUNCTION (
p. 99
CHAPTER 5 PORT FUNCTIONS
p. 117
p. 125
p. 137
CHAPTER 6 CLOCK GENERATOR
p. 157
p. 168
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Entire
chapter
p. 190
p. 191
p. 193
p. 194
p. 245
Remark “Classification” in the above table classifies revisions as follows.
Page
(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note,
(d): Addition/change of package, part number, or management division, (e): Addition/change of related
documents
Addition of (A2) grade products
(A) grade products: Under development → Under mass production
Addition of description of QB-MINI2 to Remark 2 in 2.2.4 P30 to P33 (port 3)
Addition of description of QB-MINI2 to Remark 2 in 2.2.9 P120 to P124 (port 12)
Modification of [Function] and [Illustration] in 3.3.3 Table indirect addressing
Modification of Software example in 4.4.3 Subroutine call between memory banks
Addition of description of QB-MINI2 to Remark 2 in 5.2.4 Port 3
Addition of description of QB-MINI2 to Remark 2 in 5.2.9 Port 12
Addition of description of QB-MINI2 to Remark 2 in Table 5-5 Settings of Port Mode Register
and Output Latch When Using Alternate Function
Addition of Notes 1 and 2 to Figure 6-12 Clock Generator Operation When Power Supply
Voltage Is Turned On (When 1.59 V POC Mode Is Set (Option Byte: POCMODE = 0))
Addition of Note to Figure 6-14 CPU Clock Status Transition Diagram (When 1.59 V POC
Mode Is Set (Option Byte: POCMODE = 0))
• TO00 pin output → TO00 output, TO01 pin output → TO01 output
• Addition of TO00, TO01 output in block diagram
Addition of explanation to Figure 7-11 Format of 16-Bit Timer Output Control Register 00
(TOC00)
Addition of explanation to Figure 7-12 Format of 16-Bit Timer Output Control Register 01
(TOC01)
Addition of Notes 1 and 2 to and modification of Note 3 in Figure 7-13 Format of Prescaler
Mode Register 00 (PRM00)
Addition of Notes 1 and 2 to and modification of Note 3 in Figure 7-14 Format of Prescaler
Mode Register 01 (PRM01)
Addition of explanation to 7.5.1 Rewriting CR01n during TM0n operation
µ
78F0532GB(A2)-GAH-AX, 78F0532GC(A2)-GAL-AX, 78F0532GK(A2)-GAJ-AX,
78F0533GB(A2)-GAH-AX, 78F0533GC(A2)-GAL-AX, 78F0533GK(A2)-GAJ-AX,
78F0534GB(A2)-GAH-AX, 78F0534GC(A2)-GAL-AX, 78F0534GK(A2)-GAJ-AX,
78F0535GB(A2)-GAH-AX, 78F0535GC(A2)-GAL-AX, 78F0535GK(A2)-GAJ-AX,
78F0536GB(A2)-GAH-AX, 78F0536GC(A2)-GAL-AX, 78F0536GK(A2)-GAJ-AX,
78F0537GB(A2)-GAH-AX, 78F0537GC(A2)-GAL-AX, 78F0537GK(A2)-GAJ-AX,
PD78F0531GB(A2)-GAH-AX, 78F0531GC(A2)-GAL-AX, 78F0531GK(A2)-GAJ-AX,
APPENDIX E REVISION HISTORY
User’s Manual U17260EJ6V0UD
µ
PD78F0536, 78F0537, AND 78F0537D ONLY)
Description
Classification
(c, d)
(c, d)
(c, d)
(c, d)
(c, d)
(c, d)
(a, c)
(b, c)
(b, c)
(d)
(c)
(a)
(c)
(c)
(c)
(c)
(1/5)