UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 505

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
(3) Priority specification flag registers (PR0L, PR0H, PR1L, PR1H)
Note
Caution Be sure to set bits 1 to 7 of PR1H to 1 for the
The priority specification flag registers are used to set the corresponding maskable interrupt priority order.
PR0L, PR0H, PR1L, and PR1H are set by a 1-bit or 8-bit memory manipulation instruction. If PR0L and PR0H,
and PR1L and PR1H are combined to form 16-bit registers PR0 and PR1, they are set by a 16-bit memory
manipulation instruction.
Reset signal generation sets these registers to FFH.
Address: FFE8H
Symbol
PR0L
Address: FFE9H
Symbol
PR0H
Address: FFEAH
Symbol
PR1L
Address: FFEBH
Symbol
PR1H
µ
PD78F0534, 78F0535, 78F0536, 78F0537, and 78F0537D only.
Figure 19-4. Format of Priority Specification Flag Registers (PR0L, PR0H, PR1L, PR1H)
bits 4 to 7 of PR1H to 1 for the
TMPR010
SREPR6
XXPRX
PPR7
<7>
<7>
<7>
7
1
0
1
After reset: FFH
After reset: FFH
After reset: FFH
After reset: FFH
High priority level
Low priority level
TMPR000
PPR5
PPR6
<6>
<6>
<6>
6
1
CHAPTER 19 INTERRUPT FUNCTIONS
R/W
R/W
R/W
R/W
TMPR50
WTPR
PPR4
<5>
<5>
<5>
User’s Manual U17260EJ6V0UD
5
1
µ
PD78F0534, 78F0535, 78F0536, 78F0537, and 78F0537D.
TMPRH0
KRPR
PPR3
<4>
<4>
<4>
4
1
Priority level selection
µ
PD78F0531, 78F0532, and 78F0533. Be sure to set
TMPR011
TMPRH1
TMPR51
PPR2
<3>
<3>
<3>
<3>
Note
TMPR001
DUALPR0
CSIPR10
STPR0
WTIPR
PPR1
<2>
<2>
<2>
<2>
Note
CSIPR11
SRPR0
STPR6
PPR0
<1>
<1>
<1>
<1>
Note
DMUPR
SRPR6
IICPR0
LVIPR
ADPR
<0>
<0>
<0>
<0>
Note
505

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