UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 373

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
(2) Communication operation
(a) Format and waveform example of normal transmit/receive data
Figures 15-13 and 15-14 show the format and waveform example of the normal transmit/receive data.
1. LSB-first transmission/reception
2. MSB-first transmission/reception
One data frame consists of the following bits.
• Start bit ... 1 bit
• Character bits ... 7 or 8 bits
• Parity bit ... Even parity, odd parity, 0 parity, or no parity
• Stop bit ... 1 or 2 bits
The character bit length, parity, and stop bit length in one data frame are specified by asynchronous serial
interface operation mode register 6 (ASIM6).
Whether data is communicated with the LSB or MSB first is specified by bit 1 (DIR6) of asynchronous serial
interface control register 6 (ASICL6).
Whether the T
Start
Start
bit
bit
X
D6 pin outputs normal or inverted data is specified by bit 0 (TXDLV6) of ASICL6.
Figure 15-13. Format of Normal UART Transmit/Receive Data
D0
D7
D1
D6
CHAPTER 15 SERIAL INTERFACE UART6
D2
D5
User’s Manual U17260EJ6V0UD
D3
D4
Character bits
Character bits
1 data frame
1 data frame
D4
D3
D5
D2
D6
D1
D7
D0
Parity
Parity
bit
bit
Stop bit
Stop bit
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