DSPIC33FJ128MC804-H/ML Microchip Technology, DSPIC33FJ128MC804-H/ML Datasheet - Page 167

• Manufacturer Part Number: DSPIC33FJ128MC804-H/ML
• Description: 16-bit DSC, 128KB Flash, Motor, CAN, DMA, 40 MIPS, NanoWatt 44 QFN 8x8x0.9mm TUB
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC804-H/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b, D/A 6x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 140°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.6.2.2
In contrast to inputs, the outputs of the peripheral pin
select options are mapped on the basis of the pin. In
this case, a control register associated with a particular
pin dictates the peripheral output to be mapped. The
RPORx registers are used to control output mapping.
Like the RPINRx registers, each register contains sets
of 5-bit fields, with each set associated with one RPn
pin (see
value of the bit field corresponds to one of the
peripherals, and that peripheral’s output is mapped to
the pin (see
The list of peripherals for output mapping also includes
a null value of ‘00000’
technique. This permits any given pin to remain
unconnected from the output of any of the pin
selectable peripherals.
TABLE 11-2:
© 2011 Microchip Technology Inc.
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
Function
Register 11-21
C1OUT
C2OUT
UPDN1
UPDN2
U1RTS
U2RTS
SDO1
SDO2
SCK1
SCK2
NULL
U1TX
U2TX
C1TX
OC1
OC2
OC3
OC4
SS1
SS2
Table 11-2
Output Mapping
OUTPUT SELECTION FOR REMAPPABLE PIN (RPn)
and
through
Figure
because of the mapping
Register
11-3).
RPnR<4:0>
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
10000
10010
10011
10100
10101
11010
11011
11-33). The
RPn tied to default port pin
RPn tied to Comparator1 Output
RPn tied to Comparator2 Output
RPn tied to UART1 Transmit
RPn tied to UART1 Ready To Send
RPn tied to UART2 Transmit
RPn tied to UART2 Ready To Send
RPn tied to SPI1 Data Output
RPn tied to SPI1 Clock Output
RPn tied to SPI1 Slave Select Output
RPn tied to SPI2 Data Output
RPn tied to SPI2 Clock Output
RPn tied to SPI2 Slave Select Output
RPn tied to ECAN1 Transmit
RPn tied to Output Compare 1
RPn tied to Output Compare 2
RPn tied to Output Compare 3
RPn tied to Output Compare 4
RPn tied to QEI1 direction (UPDN) status
RPn tied to QEI2 direction (UPDN) status
FIGURE 11-3:
UPDN2 Output enable
U1RTS Output enable 4
U1TX Output enable
UPDN2 Output
U1RTS Output 4
U1TX Output
default
default
Output Name
RPnR<4:0>
MULTIPLEXING OF
REMAPPABLE OUTPUT
FOR RPn
0
27
0
27
3
3
Output Enable
Output Data
DS70291E-page 167
RPn