DSPIC33FJ128MC804-H/ML Microchip Technology, DSPIC33FJ128MC804-H/ML Datasheet - Page 422

16-bit DSC, 128KB Flash, Motor, CAN, DMA, 40 MIPS, NanoWatt 44 QFN 8x8x0.9mm TUB

DSPIC33FJ128MC804-H/ML

Manufacturer Part Number
DSPIC33FJ128MC804-H/ML
Description
16-bit DSC, 128KB Flash, Motor, CAN, DMA, 40 MIPS, NanoWatt 44 QFN 8x8x0.9mm TUB
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128MC804-H/ML

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x10b/12b, D/A 6x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 140°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
Revision D (November 2009)
The revision includes the following global update:
• Added Note 2 to the shaded table that appears at
This revision also includes minor typographical and
formatting changes throughout the data sheet text.
All other major changes are referenced by their
respective section in the following table.
TABLE A-3:
DS70291E-page 422
“High-Performance, 16-bit Digital Signal
Controllers”
Section 11.0 “I/O Ports”
Section 20.0 “Universal Asynchronous
Receiver Transmitter (UART)”
Section 22.0 “10-bit/12-bit Analog-to-Digital
Converter (ADC1)”
Section 23.0 “Audio Digital-to-Analog
Converter (DAC)”
Section 28.0 “Special Features”
Section 31.0 “Electrical Characteristics”
Section 32.0 “High Temperature Electrical
Characteristics”
“Product Identification System”
the beginning of each chapter. This new note
provides information regarding the availability of
registers and their associated bits
Section Name
MAJOR SECTION UPDATES
Added information on high temperature operation (see “Operating
Range:”).
Changed the reference to digital-only pins to 5V tolerant pins in the
second paragraph of Section 11.2 “Open-Drain Configuration”.
Updated the two baud rate range features to: 10 Mbps to 38 bps at
40 MIPS.
Updated the ADC block diagrams (see Figure 22-1 and Figure 22-2).
Removed last sentence of the first paragraph in the section.
Added a shaded note to Section 23.2 “DAC Module Operation”.
Updated Figure 23-2: “Audio DAC Output for Ramp Input
(Unsigned)”.
Updated the second paragraph and removed the fourth paragraph in
Section 28.1 “Configuration Bits”.
Updated the Device Configuration Register Map (see Table 28-1).
Updated the Absolute Maximum Ratings for high temperature and
added Note 4.
Removed parameters DI26, DI28 and DI29 from the I/O Pin Input
Specifications (see Table 31-9).
Updated the SPIx Module Slave Mode (CKE = 1) Timing
Characteristics (see Figure 31-17).
Removed Table 31-45: Audio DAC Module Specifications. Original
contents were updated and combined with Table 31-44 of the same
name.
Added new chapter with high temperature specifications.
Added the “H” definition for high temperature.
Update Description
© 2011 Microchip Technology Inc.

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