DSPIC33FJ128MC804-H/ML Microchip Technology, DSPIC33FJ128MC804-H/ML Datasheet - Page 65

• Manufacturer Part Number: DSPIC33FJ128MC804-H/ML
• Description: 16-bit DSC, 128KB Flash, Motor, CAN, DMA, 40 MIPS, NanoWatt 44 QFN 8x8x0.9mm TUB
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC804-H/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b, D/A 6x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 140°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 4-33:
TABLE 4-34:
TABLE 4-35:
TABLE 4-36:
TRISA
PORTA
LATA
ODCA
Legend:
TRISB
PORTB
LATB
ODCB
Legend:
TRISC
PORTC
LATC
ODCC
Legend:
RCON
OSCCON
CLKDIV
PLLFBD
OSCTUN
ACLKCON
Legend:
Note
File Name
File Name
File Name
File Name
1:
2:
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
RCON register Reset values dependent on type of Reset.
OSCCON register Reset values dependent on the FOSC Configuration bits and by type of Reset.
Addr
02C0
02C2
02C4
02C6
Addr
02D0
02D2
02D4
02D6
02CC
Addr
074A
Addr
02C8
02CA
02CE
0740
0742
0744
0746
0748
PORTA REGISTER MAP FOR dsPIC33FJ128MC204/804, dsPIC33FJ64MC204/804 AND dsPIC33FJ32MC304
PORTB REGISTER MAP
PORTC REGISTER MAP FOR dsPIC33FJ128MC204/804, dsPIC33FJ64MC204/804 AND dsPIC33FJ32MC304
SYSTEM CONTROL REGISTER MAP
TRAPR IOPUWR
Bit 15
TRISB15
Bit 15
LATB15
Bit 15
ROI
Bit 15
RB15
—
—
—
—
—
—
—
—
—
—
—
—
—
Bit 14
Bit 14
TRISB14
LATB14
Bit 14
—
—
—
Bit 14
RB14
—
—
—
—
—
—
—
—
—
SELACLK
COSC<2:0>
DOZE<2:0>
Bit 13
Bit 13
TRISB13
—
—
—
Bit 13
LATB13
Bit 13
RB13
—
—
—
—
—
—
—
—
—
Bit 12
TRISB12
Bit 12
Bit 12
LATB12
Bit 12
AOSCMD<1:0>
—
—
—
—
RB12
—
—
—
—
—
—
—
—
Bit 11
Bit 11
TRISB11
ODCB11
LATB11
Bit 11
DOZEN
—
—
—
—
RB11
—
—
—
—
Bit 11
—
—
—
—
TRISA10
ODCA10
LATA10
Bit 10
Bit 10
RA10
TRISB10
ODCB10
LATB10
Bit 10
RB10
—
—
—
—
Bit 10
—
—
—
APSTSCLR<2:0>
FRCDIV<2:0>
NOSC<2:0>
TRISC9
LATC9
ODCC9
TRISA9
ODCA9
LATA9
TRISB9
Bit 9
Bit 9
ODCB9
RC9
LATB9
RA9
Bit 9
RB9
Bit 9
CM
—
—
TRISC8
ODCC8
TRISA8
LATC8
ODCA8
VREGS
TRISB8
LATA8
Bit 8
Bit 8
LATB8
ODCB8
RC8
RA8
Bit 8
Bit 8
RB8
—
TRISC7
ODCC7
CLKLOCK
ASRCSEL
LATC7
TRISA7
ODCA7
LATA7
Bit 7
Bit 7
RC7
RA7
TRISB7
ODCB7
LATB7
EXTR
Bit 7
Bit 7
RB7
PLLPOST<1:0>
—
TRISC6
ODCC6
LATC6
Bit 6
Bit 6
RC6
—
—
—
IOLOCK
—
TRISB6
ODCB6
LATB6
Bit 6
SWR
RB6
Bit 6
—
—
TRISC5
ODCC5
LATC5
Bit 5
Bit 5
RC5
SWDTEN
—
—
—
—
TRISB5
ODCB5
LATB5
Bit 5
RB5
LOCK
Bit 5
—
—
PLLDIV<8:0>
TRISC4
TRISA4
ODCC4
LATC4
LATA4
Bit 4
Bit 4
TRISB4
RC4
RA4
LATB4
—
Bit 4
WDTO
RB4
Bit 4
—
—
—
TRISC3
TRISA3
ODCC3
LATC3
LATA3
TRISB3
Bit 3
Bit 3
LATB3
RC3
SLEEP
RA3
Bit 3
RB3
Bit 3
—
—
CF
—
TUN<5:0>
PLLPRE<4:0>
TRISC2
TRISA2
LATC2
LATA2
TRISB2
Bit 2
LATB2
Bit 2
RC2
Bit 2
IDLE
RA2
Bit 2
RB2
—
—
—
—
—
LPOSCEN
TRISA1
TRISB1
TRISC1
LATA1
LATC1
LATB1
Bit 1
Bit 1
Bit 1
RA1
RC1
Bit 1
BOR
RB1
—
—
—
—
TRISB0
TRISA0
TRISC0
LATB0
LATA0
LATC0
OSWEN
Bit 0
Bit 0
RB0
RA0
Bit 0
RC0
Bit 0
POR
—
—
—
—
Resets
Resets
Resets
Resets
xxxx
0300
001F
xxxx
xxxx
0000
FFFF
xxxx
xxxx
0000
03FF
xxxx
xxxx
0000
3040
0030
0000
0000
All
All
All
All
(1)
(2)