DSPIC33FJ128MC804-H/ML Microchip Technology, DSPIC33FJ128MC804-H/ML Datasheet - Page 287

• Manufacturer Part Number: DSPIC33FJ128MC804-H/ML
• Description: 16-bit DSC, 128KB Flash, Motor, CAN, DMA, 40 MIPS, NanoWatt 44 QFN 8x8x0.9mm TUB
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC804-H/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b, D/A 6x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 140°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

23.0
The Audio Digital-to-Analog Converter (DAC) module
is a 16-bit Delta-Sigma signal converter designed for
audio applications. It has two output channels, left and
right to support stereo applications. Each DAC output
channel provides three voltage outputs, positive DAC
output, negative DAC output, and the midpoint voltage
output
dsPIC33FJ128MC804
dsPIC33FJ64MC802
devices provide positive DAC output and negative DAC
output voltages.
23.1
• 16-bit resolution (14-bit accuracy)
• Second-Order Digital Delta-Sigma Modulator
• 256 X Over-Sampling Ratio
• 128-Tap FIR Current-Steering Analog
• 100 KSPS Maximum Sampling Rate
• User controllable Sample Clock
• Input Frequency 45 kHz max
• Differential Analog Outputs
• Signal-To-Noise: 90 dB
• 4-deep input Buffer
• 16-bit Processor I/O, and DMA interfaces
23.2
The functional block diagram of the Audio DAC module
is shown in
provides a 4-deep data input FIFO buffer for each
output channel. If the DMA module and/or the
processor cannot provide output data in a timely
manner, and the FIFO becomes empty, the DAC
accepts data from the DAC Default Data register
© 2011 Microchip Technology Inc.
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
Reconstruction Filter
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
AUDIO DIGITAL-TO-ANALOG
CONVERTER (DAC)
KEY FEATURES
DAC Module Operation
for
of
dsPIC33FJ64MCX02/X04
dsPIC33FJ128MCX02/X04
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to “Section 33. Audio Digi-
tal-to-Analog
(DS70211) of the dsPIC33F/PIC24H
Family Reference Manual, which is avail-
able from the Microchip web site
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
Figure
the
the
23-1. The Audio DAC module
and
dsPIC33FJ64MC804
dsPIC33FJ32MC302/304,
Converter
dsPIC33FJ128MC802
devices.
family
(DAC)”
and
The
and
of
in
(DACDFLT). This safety feature is useful for industrial
control applications where the DAC output controls an
important processor or machinery. The DACDFLT
register should be initialized with a “safe” output value.
Often the safe output value is either the midpoint value
(0x8000) or a zero value (0x0000).
The digital interpolator up-samples the input signals,
where the over-sampling ratio is 256x which creates
data points between the user supplied data points. The
interpolator also includes processing by digital filters to
provide “noise shaping” to move the converter noise
above 20 kHz (upper limit of the pass band). The output
of the interpolator drives the Sigma-Delta modulator.
The serial data bit stream from the Sigma-Delta modu-
lator is processed by the reconstruction filter. The dif-
ferential outputs of the reconstruction filter are
amplified by Op Amps to provide the required
peak-to-peak voltage swing.
23.3
The DAC output data stream can be in a two’s comple-
ment signed number format or as an unsigned number
format.
The Audio DAC module features the ability to accept
the 16-bit input data in a two’s complement signed
number format or as an unsigned number format.
The data formatting is controlled by the Data Format
Control (FORM<8>) bit in the DAC1CON register.
The supported formats are:
• 1 = Signed (two’s complement)
• 0 = Unsigned
If the FORM bit is configured for “Unsigned data” then
the user input data yields the following behavior:
• 0xFFFF = most positive output voltage
• 0x8000 = mid point output voltage
• 0x7FFF = a value just below the midpoint
• 0x0000 = minimum output voltage
If the FORM bit is configured for “signed data” then the
user input data yields the following behavior:
• 0x7FFF = most positive output voltage
• 0x0000 = mid point output voltage
• 0xFFFF = value just below the midpoint
• 0x8000 = minimum output voltage
The Audio DAC provides an analog output proportional
to the digital input value. The maximum 100,000 sam-
ples per second (100 ksps) update rate provides good
quality audio reproduction.
Note:
DAC Output Format
The
specifically for audio applications and is
not
applications.
recommended
DAC
module
for
DS70291E-page 287
is
control
designed
type