DSPIC33FJ128MC804-H/ML Microchip Technology, DSPIC33FJ128MC804-H/ML Datasheet - Page 53

• Manufacturer Part Number: DSPIC33FJ128MC804-H/ML
• Description: 16-bit DSC, 128KB Flash, Motor, CAN, DMA, 40 MIPS, NanoWatt 44 QFN 8x8x0.9mm TUB
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC804-H/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b, D/A 6x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 140°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 4-12:
TABLE 4-13:
TABLE 4-14:
I2C1RCV
I2C1TRN
I2C1BRG
I2C1CON
I2C1STAT
I2C1ADD
I2C1MSK
Legend:
U1MODE
U1STA
U1TXREG
U1RXREG
U1BRG
Legend:
U2MODE
U2STA
U2TXREG
U2RXREG
U2BRG
Legend:
SFR Name
SFR Name
SFR Name
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Addr
0204
0206
020A
020C
Addr
SFR
0200
0202
0208
SFR
0220
0222
0224
0226
0228
Addr
SFR
0230
0232
0234
0236
0238
I2C1 REGISTER MAP
UART1 REGISTER MAP
UART2 REGISTER MAP
ACKSTAT
UTXISEL1
UTXISEL1
UARTEN
UARTEN
I2CEN
Bit 15
Bit 15
Bit 15
—
—
—
—
—
—
—
—
—
TRSTAT
UTXINV
UTXINV
Bit 14
Bit 14
Bit 14
—
—
—
—
—
—
—
—
—
—
—
—
UTXISEL0
UTXISEL0
I2CSIDL
Bit 13
Bit 13
USIDL
Bit 13
USIDL
—
—
—
—
—
—
—
—
—
—
SCLREL
Bit 12
Bit 12
Bit 12
IREN
IREN
—
—
—
—
—
—
—
—
—
—
—
—
UTXBRK
UTXBRK
RTSMD
IPMIEN
RTSMD
Bit 11
Bit 11
Bit 11
—
—
—
—
—
—
—
—
—
—
UTXEN
UTXEN
Bit 10
Bit 10
Bit 10
A10M
BCL
—
—
—
—
—
—
—
—
—
—
—
UTXBF
UTXBF
GCSTAT
UEN1
DISSLW
UEN1
Bit 9
Bit 9
Bit 9
—
—
—
—
—
—
—
Baud Rate Generator Prescaler
Baud Rate Generator Prescaler
UEN0
TRMT
URX8
UTX8
UEN0
TRMT
URX8
Bit 8
UTX8
Bit 8
ADD10
SMEN
Bit 8
—
—
WAKE
WAKE
Bit 7
Bit 7
IWCOL
GCEN
URXISEL<1:0>
URXISEL<1:0>
Bit 7
LPBACK
LPBACK
STREN
I2COV
Bit 6
Bit 6
Bit 6
Address Mask Register
ACKDT
ABAUD
ADDEN
ADDEN
ABAUD
Baud Rate Generator Register
Address Register
Bit 5
Bit 5
D_A
Bit 5
UART Received Register
UART Transmit Register
UART Transmit Register
UART Receive Register
URXINV
URXINV
ACKEN
RIDLE
RIDLE
Transmit Register
Bit 4
Receive Register
Bit 4
Bit 4
P
RCEN
BRGH
PERR
BRGH
PERR
Bit 3
Bit 3
Bit 3
S
FERR
FERR
Bit 2
R_W
Bit 2
PEN
Bit 2
PDSEL<1:0>
PDSEL<1:0>
RSEN
OERR
OERR
Bit 1
Bit 1
Bit 1
RBF
URXDA
URXDA
STSEL
STSEL
Bit 0
Bit 0
Bit 0
SEN
TBF
Resets
Resets
Resets
0000
00FF
0000
1000
0000
0000
0000
0000
0110
xxxx
0000
0000
0000
0110
xxxx
0000
0000
All
All
All