DSPIC33FJ128MC804-H/ML Microchip Technology, DSPIC33FJ128MC804-H/ML Datasheet - Page 311

• Manufacturer Part Number: DSPIC33FJ128MC804-H/ML
• Description: 16-bit DSC, 128KB Flash, Motor, CAN, DMA, 40 MIPS, NanoWatt 44 QFN 8x8x0.9mm TUB
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC804-H/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b, D/A 6x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 140°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26.4
The CRC module provides the following registers:
• CRC Control Register
• CRC XOR Polynomial Register
REGISTER 26-1:
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13
bit 12-8
bit 7
bit 6
bit 5
bit 4
bit 3-0
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
CRCFUL
U-0
R-0
—
Registers
Unimplemented: Read as ‘0’
CSIDL: CRC Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
VWORD<4:0>: Pointer Value bits
Indicates the number of valid words in the FIFO. Has a maximum value of 8 when PLEN<3:0> > 7,
or 16 when PLEN<3:0>
CRCFUL: FIFO Full bit
1 = FIFO is full
0 = FIFO is not full
CRCMPT: FIFO Empty Bit
1 = FIFO is empty
0 = FIFO is not empty
Unimplemented: Read as ‘0’
CRCGO: Start CRC bit
1 = Start CRC serial shifter
0 = Turn off the CRC serial shifter after the FIFO is empty
PLEN<3:0>: Polynomial Length bits
Denotes the length of the polynomial to be generated minus 1.
CRCMPT
U-0
R-1
—
CRCCON: CRC CONTROL REGISTER
‘1’ = Bit is set
W = Writable bit
CSIDL
R/W-0
U-0
—
≤
7.
CRCGO
R/W-0
R-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R-0
VWORD<4:0>
R/W-0
R-0
PLEN<3:0>
x = Bit is unknown
R/W-0
R-0
DS70291E-page 311
R/W-0
R-0
bit 8
bit 0