DSPIC33FJ128MC804-H/ML Microchip Technology, DSPIC33FJ128MC804-H/ML Datasheet - Page 359

• Manufacturer Part Number: DSPIC33FJ128MC804-H/ML
• Description: 16-bit DSC, 128KB Flash, Motor, CAN, DMA, 40 MIPS, NanoWatt 44 QFN 8x8x0.9mm TUB
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC804-H/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b, D/A 6x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 140°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 31-21: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
© 2011 Microchip Technology Inc.
AC CHARACTERISTICS
SY10
SY11
SY12
SY13
SY20
SY30
SY35
Note 1:
Param
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
No.
2:
T
T
T
T
T
T
T
Symbol
OST
IOZ
WDT
MC
PWRT
POR
FSCM
These parameters are characterized but not tested in manufacturing.
Data in “Typ” column is at 3.3V, 25°C unless otherwise stated.
L
1
TIMING REQUIREMENTS
MCLR Pulse Width (low)
Power-up Timer Period
Power-on Reset Delay
I/O High-Impedance from
MCLR Low or Watchdog
Timer Reset
Watchdog Timer Time-out
Period
Oscillator Start-up Time
Fail-Safe Clock Monitor
Delay
Characteristic
(1)
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
0.68
Min
—
—
—
—
2
3
1024 T
Typ
0.72
128
500
16
32
64
10
—
—
2
4
8
(2)
OSC
Max
900
1.2
30
—
—
—
—
-40°C ≤ T
-40°C ≤ T
Units
ms
μs
μs
μs
μs
—
—
A
A
-40°C to +85°C
-40°C to +85°C
User programmable
-40°C to +85°C
See
Timer (WDT)”
specification F21
T
-40°C to +85°C
≤ +85°C for Industrial
≤ +125°C for Extended
OSC
Section 28.4 “Watchdog
= OSC1 period
Conditions
DS70291E-page 359
and LPRC
—
(Table
31-19)