DSPIC33FJ128MC804-H/ML Microchip Technology, DSPIC33FJ128MC804-H/ML Datasheet - Page 64

• Manufacturer Part Number: DSPIC33FJ128MC804-H/ML
• Description: 16-bit DSC, 128KB Flash, Motor, CAN, DMA, 40 MIPS, NanoWatt 44 QFN 8x8x0.9mm TUB
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC804-H/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b, D/A 6x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 140°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 4-29:
TABLE 4-30:
TABLE 4-31:
TABLE 4-32:
ALRMVAL
ALCFGRPT
RTCVAL
RCFGCAL
PADCFG1
Legend:
CRCCON
CRCXOR
CRCDAT
CRCWDAT
Legend:
CMCON
CVRCON
Legend:
TRISA
PORTA
LATA
ODCA
Legend:
File Name
File Name
File Name
File Name
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Addr
Addr
0630
0632
02C0
02C2
02C4
02C6
Addr
0640
0642
0644
0646
Addr
0620
0622
0624
0626
02FC
REAL-TIME CLOCK AND CALENDAR REGISTER MAP
CRC REGISTER MAP
DUAL COMPARATOR REGISTER MAP
PORTA REGISTER MAP FOR dsPIC33FJ128MC202/802, dsPIC33FJ64MC202/802 AND dsPIC33FJ32MC302
CMIDL
ALRMEN
Bit 15
Bit 15
RTCEN
Bit 15
Bit 15
—
—
—
—
—
—
—
Bit 14
Bit 14
Bit 14
CHIME
Bit 14
—
—
—
—
—
—
—
—
—
C2EVT
Bit 13
Bit 13
RTCWREN
CSIDL
Bit 13
—
—
—
—
—
Bit 13
—
C1EVT
Bit 12
Bit 12
Bit 12
—
—
—
—
—
RTCSYNC
Bit 12
AMASK<3:0>
—
Bit 11
C2EN
Bit 11
Bit 11
—
—
—
—
—
HALFSEC
Bit 11
VWORD<4:0>
—
Bit 10
C1EN
Bit 10
Bit 10
—
—
—
—
—
RTCC Value Register Window based on RTCPTR<1:0>
Alarm Value Register Window based on APTR<1:0>
RTCOE
Bit 10
C2OUTEN
—
Bit 9
Bit 9
—
Bit 9
—
—
—
—
CRC Data Input Register
Bit 9
ALRMPTR<1:0>
CRC Result Register
C1OUTEN
RTCPTR<1:0>
—
Bit 8
Bit 8
Bit 8
—
—
—
—
—
X<15:0>
Bit 8
CRCFUL CRCMPT
—
Bit 7
CVREN
Bit 7
C2OUT
—
—
—
—
Bit 7
Bit 7
—
Bit 6
CVROE
C1OUT
Bit 6
—
—
—
—
Bit 6
Bit 6
—
Bit 5
Bit 5
C2INV
CVRR
—
—
—
—
Bit 5
—
Bit 5
—
CRCGO
TRISA4
LATA4
CVRSS
Bit 4
C1INV
Bit 4
RA4
Bit 4
—
Bit 4
—
ARPT<7:0>
CAL<7:0>
C2NEG
TRISA3
LATA3
Bit 3
Bit 3
Bit 3
RA3
Bit 3
—
—
C2POS
TRISA2
LATA2
Bit 2
Bit 2
Bit 2
Bit 2
RA2
—
—
PLEN<3:0>
CVR<3:0>
RTSECSEL PMPTTL
C1NEG
TRISA1
Bit 1
LATA1
Bit 1
Bit 1
Bit 1
RA1
—
C1POS
TRISA0
Bit 0
LATA0
Bit 0
Bit 0
RA0
Bit 0
—
Resets
Resets
Resets
Resets
0000
0000
0000
0000
0000
0000
001F
xxxx
xxxx
0000
xxxx
0000
xxxx
0000
0000
All
All
All
All