ATAM862P-TNSY4D Atmel, ATAM862P-TNSY4D Datasheet - Page 30

• Manufacturer Part Number: ATAM862P-TNSY4D
• Description: IC MCU FLASH 4K TX 433MHZ 24SSOP
• Manufacturer: Atmel

Specifications of ATAM862P-TNSY4D

• Applications: UHF ASK/FSK
• Core Processor: MARC4
• Program Memory Type: FLASH (4 kB)
• Controller Series: MARC4 4-Bit
• Ram Size: 256 x 4
• Interface: SSI
• Number Of I /o: 11
• Voltage - Supply: 1.8 V ~ 4 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Processor Series: ATAM862x
• Core: MARC4
• Data Bus Width: 4 bit
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.2.5
19.3
19.3.1
30
Clock Management
ATAM862-4
32-kHz Oscillator
Clock Management Register (CM)
Some applications require long-term time keeping or low resolution timing. In this case, an
on-chip, low power 32-kHz crystal oscillator can be used to generate both the SUBCL and the
SYSCL. In this mode, power consumption is greatly reduced. The 32-kHz crystal oscillator can
not be stopped while the power-down mode is in operation.
Figure 19-7. 32-kHz Crystal Oscillator
Note:
The clock management register controls the system clock divider and synchronization stage.
Writing to this register triggers the synchronization cycle.
CM:
NSTOP
CCS
CSS1
CSS0
Both, the 4-MHz and the 32-kHz crystal oscillator, use an integrated 14 stage divider circuit to sta-
bilize oscillation before the oscillator output is used as system clock. This results in an additional
delay of about 4 ms for the 4-MHz crystal and about 500 ms for the 32-kHz crystal.
Not STOP peripheral clock
NSTOP = 0, stops the peripheral clock while the core is in SLEEP mode
NSTOP = 1, enables the peripheral clock while the core is in SLEEP mode
Core Clock Select
CCS = 1, the internal RC-oscillator 1 generates SYSCL
CCS = 0, the 4-MHz crystal oscillator, the 32-kHz crystal oscillator, an external
clock source or the internal RC-oscillator 2 with the external resistor at OSC1
generates SYSCL dependent on the setting of OS0 and OS1 in the system
configuration register
Core Speed Select 1
Core Speed Select 0
NSTOP
Bit 3
Configurable
*
32 kHz
XTAL
OSC1
OSC2
CCS
Bit 2
C1
C2
*
*
CSS1
Bit 1
Oscin
Oscout
oscillator
32-kHz
32Out
CSS0
Bit 0
Auxiliary register address: "3"hex
32Out
Reset value: 1111b
4551G–4BMCU–07/07