ATAM862P-TNSY4D Atmel, ATAM862P-TNSY4D Datasheet - Page 32

• Manufacturer Part Number: ATAM862P-TNSY4D
• Description: IC MCU FLASH 4K TX 433MHZ 24SSOP
• Manufacturer: Atmel

Specifications of ATAM862P-TNSY4D

• Applications: UHF ASK/FSK
• Core Processor: MARC4
• Program Memory Type: FLASH (4 kB)
• Controller Series: MARC4 4-Bit
• Ram Size: 256 x 4
• Interface: SSI
• Number Of I /o: 11
• Voltage - Supply: 1.8 V ~ 4 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Processor Series: ATAM862x
• Core: MARC4
• Data Bus Width: 4 bit
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21. Peripheral Modules
21.1
32
Addressing Peripherals
ATAM862-4
The sleep mode can only be kept when none of the interrupt pending or active register bits are
set. The application of the $AUTOSLEEP routine ensures the correct function of the sleep
mode. For standard applications use the $AUTOSLEEP routine to enter the power-down mode.
Using the SLEEP instruction instead of the $AUTOSLEEP following an I/O instruction requires
to insert 3 non-I/O instruction cycles (for example NOP NOP NOP) between the IN or OUT com-
mand and the SLEEP command.
The total power consumption is directly proportional to the active time of the microcontroller. For
a rough estimation of the expected average system current consumption, the following formula
should be used:
I
I
The microcontroller block has various power-down modes. During the sleep mode the clock for
the microcontroller block core is stopped. With the NSTOP bit in the clock management register
(CM), it is programmable if the clock for the on-chip peripherals is active or stopped during the
sleep mode. If the clock for the core and the peripherals is stopped, the selected oscillator is
switched off. An exception is the 32-kHz oscillator, if it is selected it runs continuously indepen-
dent of the NSTOP bit. If the oscillator is stopped or the 32-kHz oscillator is selected, power
consumption is extremely low.
Table 20-1.
Accessing the peripheral modules takes place via the I/O bus (see
IN or OUT instructions allow direct addressing of up to 16 I/O modules. A dual register address-
ing scheme has been adopted to enable direct addressing of the primary register. To address
the auxiliary register, the access must be switched with an auxiliary switching module. Thus, a
single IN (or OUT) to the module address will read (or write into) the module primary register.
Accessing the auxiliary register is performed with the same instruction preceded by writing the
module address into the auxiliary switching module. Byte wide registers are accessed by multi-
ple IN- (or OUT-) instructions. For more complex peripheral modules, with a larger number of
registers, extended addressing is used. In this case, a bank of up to 16 subport registers are
indirectly addressed with the subport address. The first OUT instruction writes the subport
address to the sub address register, the second IN or OUT instruction reads data from or writes
data to the addressed subport.
total
DD
Note:
Power-down
depends on V
SLEEP
(V
Active
Mode
DD
, f
1. Osc-Stop = SLEEP and NSTOP and WDL
syscl
) = I
Power-down Modes
SLEEP
SLEEP
Core
DD
CPU
RUN
Sleep
and f
+ (I
syscl
DD
Osc-Sto
YES
p
NO
NO
× t
(1)
active
/t
Brown-out
total
Function
Active
Active
STOP
)
4-MHz Oscillator
RC-oscillator 1
RC-oscillator 2
STOP
RUN
RUN
Figure 21-1 on page
Oscillator
32-kHz
RUN
RUN
RUN
4551G–4BMCU–07/07
Input Clock
External
STOP
YES
YES
33). The