ATAM862P-TNSY4D Atmel, ATAM862P-TNSY4D Datasheet - Page 82

• Manufacturer Part Number: ATAM862P-TNSY4D
• Description: IC MCU FLASH 4K TX 433MHZ 24SSOP
• Manufacturer: Atmel

Specifications of ATAM862P-TNSY4D

• Applications: UHF ASK/FSK
• Core Processor: MARC4
• Program Memory Type: FLASH (4 kB)
• Controller Series: MARC4 4-Bit
• Ram Size: 256 x 4
• Interface: SSI
• Number Of I /o: 11
• Voltage - Supply: 1.8 V ~ 4 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Processor Series: ATAM862x
• Core: MARC4
• Data Bus Width: 4 bit
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

23.9.3
23.9.4
82
ATAM862-4
Serial Interface Status and Control Register (SISC)
Serial Transmit Buffer (STB) – Byte Write
T
star
Write
Read
MCL
RACK
TACK
SIM
IFN
SRDY
ACT
First write cycle
Second write cycle
he STB is the transmit buffer of the SSI. The SSI transfers the transmit buffer into the shift regi
ts shifting with
Multi-Chip Link activation
MCL = 1,multi-chip link disabled. This bit has to be set to "0" during
MCL = 0, connects SC and SD additionally to the internal multi-chip link pads
Receive ACKnowledge status/control bit for MCL mode
RACK = 0, transmit acknowledge in next receive telegram
RACK = 1, transmit no acknowledge in last receive telegram
Transmit ACKnowledge status/control bit for MCL mode
TACK = 0, acknowledge received in last transmit telegram
TACK = 1, no acknowledge received in last transmit telegram
Serial Interrupt Mask
SIM = 1, disable interrupts
SIM = 0, enable serial interrupt. An interrupt is generated.
Interrupt FuNction
IFN = 1, the serial interrupt is generated at the end of telegram
IFN = 0, the serial interrupt is generated when the SRDY goes low (i.e., buffer
Serial interface buffer ReaDY status flag
SRDY = 1,
SRDY = 0,
Transmission ACTive status flag
ACT = 1, transmission is active, i.e., serial data transfer. Stop or start conditions
ACT = 0, transmission is inactive
the
Bit 3
MCL
–
most significant bit.
transactions to/from the internal EEPROM
becomes empty/full in transmit/receive mode)
are currently in progress.
Bit 3
Bit 7
in receive mode: receive buffer empty
in transmit mode: transmit buffer full
in receive mode: receive buffer full
in transmit mode: transmit buffer empty
Bit 2
RACK
TACK
Bit 2
Bit 6
Bit 1
ACT
SIM
Bit 1
Bit 5
Bit 0
Bit 0
Bit 4
SRDY
IFN
Primary register address: "A"hex
Primary register address: "9"hex
Reset value: xxxxb
Reset value: xxxxb
Reset value: 1111b
Reset value: xxxxb
4551G–4BMCU–07/07
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