ATAM862P-TNSY4D Atmel, ATAM862P-TNSY4D Datasheet - Page 96

• Manufacturer Part Number: ATAM862P-TNSY4D
• Description: IC MCU FLASH 4K TX 433MHZ 24SSOP
• Manufacturer: Atmel

Specifications of ATAM862P-TNSY4D

• Applications: UHF ASK/FSK
• Core Processor: MARC4
• Program Memory Type: FLASH (4 kB)
• Controller Series: MARC4 4-Bit
• Ram Size: 256 x 4
• Interface: SSI
• Number Of I /o: 11
• Voltage - Supply: 1.8 V ~ 4 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Processor Series: ATAM862x
• Core: MARC4
• Data Bus Width: 4 bit
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.6
24.6.1
96
Serial Interface
ATAM862-4
Serial Protocol
The EEPROM uses a two-wire serial interface (TWI) to the microcontroller for read and write
accesses to the data. It is considered to be a slave in all these applications. That means, the
controller has to be the master that initiates the data transfer and provides the clock for transmit
and receive operations.
The serial interface is controlled by the microcontroller which generates the serial clock and con-
trols the access via the SCL-line and SDA-line. SCL is used to clock the data into and out of the
device. SDA is a bi-directional line that is used to transfer data into and out of the device. The
following protocol is used for the data transfers.
Figure 24-20. MCL Protocol
• Data states on the SDA ine changing only while SCL is low.
• Changes on the SDA line while SCL is high are interpreted as START or STOP condition.
• A START condition is defined as high to low transition on the SDA line while the SCL-line is
• A STOP condition is defined as low to high transition on the SDA line while the SCL line is
• Each data transfer must be initialized with a START condition and terminated with a STOP
• A receiving device generates an acknowledge (A) after the reception of each byte. This
• Before the START condition and after the STOP condition the device is in standby mode and
• The control byte that follows the START condition determines the following operation. It
high.
high.
condition. The START condition wakes the device from standby mode and the STOP
condition returns the device to standby mode.
requires an additional clock pulse, generated by the master. If the reception was successful
the receiving master or slave device pulls down the SDA line during that clock cycle. If an
acknowledge is not detected (N) by the interface in transmit mode, it will terminate further
data transmissions and go into receive mode. A master device must finish its read operation
by a non-acknowledge and then send a stop condition to bring the device into a known state.
the SDA line is switched as input with pull-up resistor.
consists of the 5-bit row address, 2 mode control bits and the READ/NWRITE bit that is used
to control the direction of the following transfer. A "0" defines a write access and a "1" a read
access.
SDA
SCL
Stand
by
condition
Start
valid
Data
change
Data
acknowledge
Data/
valid
condition
Stop
4551G–4BMCU–07/07
Stand-
by