ATAM862P-TNSY4D Atmel, ATAM862P-TNSY4D Datasheet - Page 56

IC MCU FLASH 4K TX 433MHZ 24SSOP

ATAM862P-TNSY4D

Manufacturer Part Number
ATAM862P-TNSY4D
Description
IC MCU FLASH 4K TX 433MHZ 24SSOP
Manufacturer
Atmel
Datasheet

Specifications of ATAM862P-TNSY4D

Applications
UHF ASK/FSK
Core Processor
MARC4
Program Memory Type
FLASH (4 kB)
Controller Series
MARC4 4-Bit
Ram Size
256 x 4
Interface
SSI
Number Of I /o
11
Voltage - Supply
1.8 V ~ 4 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
24-SSOP
Processor Series
ATAM862x
Core
MARC4
Data Bus Width
4 bit
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
22.12.5
56
ATAM862-4
Timer 2 Compare and Compare Mode Registers
Table 22-10. Timer 2 Output Select Bits
If one of these output modes is used the T2O alternate function of Port 4 must also be activated.
Timer 2 has two separate compare registers, T2CO1 for the 4-bit stage and T2CO2 for the 8-bit
stage of Timer 2. The timer compares the contents of the compare register current counter value
and if it matches it generates an output signal. Dependent on the timer mode, this signal is used
to generate a timer interrupt, to toggle the output flip-flop as SSI clock or as a clock for the next
counter stage.
In the 12-bit timer mode, T2CO1 contains bits 0 to 3 and T2CO2 bits 4 to 11 of the 12-bit com-
pare value. In all other modes, the two compare registers work independently as a 4- and 8-bit
compare register.
When assigned to the compare register a compare event will be suppressed.
Output Mode
1
2
3
4
5
6
7
8
T2OS2
1
1
1
1
0
0
0
0
T2OS1
1
1
0
0
1
1
0
0
T2OS0
1
0
1
0
1
0
1
0
Clock Output
Toggle mode: a Timer 2 compare match toggles the
output flip-flop (M2) -> T2O
Duty cycle burst generator 1: the DCG output signal
(DCG0) is given to the output and gated by the
output flip-flop (M2)
Duty cycle burst generator 2: the DCG output signal
(DCGO) is given to the output and gated by the SSI
internal data output (SO)
Biphase modulator: Timer 2 modulates the SSI
internal data output (SO) to Biphase code
Manchester modulator: Timer 2 modulates the SSI
internal data output (SO) to Manchester code
SSI output: T2O is used directly as SSI internal
data output (SO)
PWM mode: an 8/12-bit PWM mode
Not allowed
4551G–4BMCU–07/07

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