ATAM862P-TNSY4D Atmel, ATAM862P-TNSY4D Datasheet - Page 33

• Manufacturer Part Number: ATAM862P-TNSY4D
• Description: IC MCU FLASH 4K TX 433MHZ 24SSOP
• Manufacturer: Atmel

Specifications of ATAM862P-TNSY4D

• Applications: UHF ASK/FSK
• Core Processor: MARC4
• Program Memory Type: FLASH (4 kB)
• Controller Series: MARC4 4-Bit
• Ram Size: 256 x 4
• Interface: SSI
• Number Of I /o: 11
• Voltage - Supply: 1.8 V ~ 4 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Processor Series: ATAM862x
• Core: MARC4
• Data Bus Width: 4 bit
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 21-1. Example of I/O Addressing
4551G–4BMCU–07/07
program code
Addr.(ASW)
Addr.(Mx)
Addr.(SPort) = Subport address
Prim._Data
Aux._Data
Prim._Data(lo)= Data to be written into Auxiliary Register (low nibble)
Example of
Module ASW
qFORTH
Auxiliary Switch
Primary Reg.
Module
= Auxiliary Switch Module address
= Module Mx address
= Data to be written into Primary Register
= Data to be written into Auxiliary Register
1 Addr. (SPort) Addr. (M1)
1 Addr. (SPort) Addr. (M1) OUT
1 Addr. (SPort) Addr. (M1) OUT
2
1 Addr. (SPort) Addr. (M1) OUT
2
2
2 SPort _Data
2 SPort _Data(lo) Addr. (M1) OUT
2 SPort _Data(hi) Addr. (M1) OUT
(Address Pointer)
Subaddress Reg.
(Subport Register Write Byte)
(Subport Register Read Byte)
(Subport Register Write)
Indirect Subport Access
(Subport Register Read)
1
Module M1
Addr. (M1) IN (hi)
Addr. (M1) IN (lo)
Addr. (M1) OUT
Addr. (M1)
Primary Reg.
Subport Fh
Subport Eh
Subport 0
Subport 1
Bank of
2
IN
OUT
5
4
4 Addr. (M2) Addr. (ASW) OUT
4 Addr. (M2) Addr. (ASW) OUT
5
5
3
3
5
I/O bus
Prim._Data(hi) = Data to be written into Auxiliary Register (high nibble)
SPort_Data(lo) = Data to be written into SubPort (low nibble)
SPort_Data(hi) = Data to be written into SubPort (high nibble)
(lo) = SPort_Data (low nibble)
(hi) = SPort_Data (high nibble)
(Auxiliary Register Write Byte)
Aux._Data
Addr. (M2)
Aux._Data (lo) Addr. (M2)
Aux._Data (hi) Addr. (M2)
Prim._Data Addr. (M2)
(Auxiliary Register Read)
(Primary Register Write)
(Auxiliary Register Write)
(Primary Register Read)
Aux. Reg.
Dual Register Access
5
4
Module M2
Addr. (ASW)
Addr. (M2)
Addr. (M2)
Addr. (M2)
Primary Reg.
OUT
OUT
IN
IN
3
OUT
OUT
OUT
6 Prim._Data Addr.(M3) OUT
6
to other modules
Single Register Access
(Primary Register Write)
(Primary Register Read)
Primary Reg.
Module M3
Addr. (M3)
ATAM862-4
6
IN
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