ATAM862P-TNSY4D Atmel, ATAM862P-TNSY4D Datasheet - Page 94

• Manufacturer Part Number: ATAM862P-TNSY4D
• Description: IC MCU FLASH 4K TX 433MHZ 24SSOP
• Manufacturer: Atmel

Specifications of ATAM862P-TNSY4D

• Applications: UHF ASK/FSK
• Core Processor: MARC4
• Program Memory Type: FLASH (4 kB)
• Controller Series: MARC4 4-Bit
• Ram Size: 256 x 4
• Interface: SSI
• Number Of I /o: 11
• Voltage - Supply: 1.8 V ~ 4 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Processor Series: ATAM862x
• Core: MARC4
• Data Bus Width: 4 bit
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.4.1
Figure 24-17. Burst Modulation 2
24.4.2
94
Counter 2/2
Counter 3
ATAM862-4
Combination Mode 12: Burst Modulation 2
Combination Mode 13: FSK Modulation
CM31
CM32
TOG3
TOG2
T3O
CL3
M3
SO
0 1 0 1 2 3 4 5 0 1 0 1 2 3 4 5 0 1 0 1 2 3 4 5 0 1 0 1
3
0
SSI mode 1:
Timer 2 output mode 2:
Timer 2 output mode 1/6:
Timer 3 mode 7:
The Timer 3 counter is driven by an internal or external clock source. Its compare- and compare
mode registers must be programmed to generate the carrier frequency with the output toggle
flip-flop (M3). The internal data output (SO) of the SSI is used to enable and disable the Timer 3
output. The SSI can be supplied with the toggle signal of Timer 2.
SSI mode 1:
Timer 2 output mode 3:
Timer 2 output mode 1/6:
Timer 3 mode 8:
The two compare registers are used to generate two different time intervals. The SSI data output
selects which compare register is used for the output frequency generation. A "0" level at the
SSI data output enables the compare register 1 and a "1" level enables the compare register 2.
The compare- and compare mode registers must be programmed to generate the two frequen-
cies via the output toggle flip-flop. The SSI can be supplied with the toggle signal of Timer 2 or
any other clock source. The Timer 3 counter is driven by an internal or external clock source.
1
2
3
5 0 1 0 1
5 0 1 0 1
8-bit shift register internal data output (SO) to the Timer 3
8-bit compare counter and 4-bit prescaler
Timer 2 compare match toggles (TOG2) to the SSI
Carrier frequency burst modulation controlled by the internal
output (SO) of SSI
8-bit shift register internal data output (SO) to the Timer 3
8-bit compare counter and 4-bit prescaler
Timer 2 4-bit compare match signal (POUT) to the SSI
FSK modulation with shift register data output (SO)
5 0 1 0 1
5 0 1 0 1
3
5 0 1 0 1
0
5 0 1 0 1
1
5 0 1 0 1
2
5 0 1 0 1
4551G–4BMCU–07/07
3
5 0 1 0 1