ATAM862P-TNSY4D Atmel, ATAM862P-TNSY4D Datasheet - Page 7

• Manufacturer Part Number: ATAM862P-TNSY4D
• Description: IC MCU FLASH 4K TX 433MHZ 24SSOP
• Manufacturer: Atmel

Specifications of ATAM862P-TNSY4D

• Applications: UHF ASK/FSK
• Core Processor: MARC4
• Program Memory Type: FLASH (4 kB)
• Controller Series: MARC4 4-Bit
• Ram Size: 256 x 4
• Interface: SSI
• Number Of I /o: 11
• Voltage - Supply: 1.8 V ~ 4 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Processor Series: ATAM862x
• Core: MARC4
• Data Bus Width: 4 bit
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.3
7.3.1
7.3.2
4551G–4BMCU–07/07
CLK Output
Clock Pulse Take Over
Output Matching and Power Setting
Figure 7-1.
Using C
tances on each side of the crystal of C
crystal of C
typical with worst case tolerances of ±16.3 kHz to ±28.8 kHz results.
An output CLK signal is provided for a connected microcontroller. The delivered signal is CMOS
compatible if the load capacitance is lower than 10 pF.
The clock of the crystal oscillator can be used for clocking the microcontroller. the microcontrol-
ler block has the special feature of starting with an integrated RC-oscillator to switch on the PLL
transmitter block with ENABLE = H, and after 1 ms to assume the clock signal of the transmis-
sion IC, so the message can be sent with crystal accuracy.
The output power is set by the load impedance of the antenna. The maximum output power is
achieved with a load impedance of Z
to V
The delivered current pulse of the power amplifier is 9 mA and the maximum output power is
delivered to a resistive load of 465Ω if the 1.0 pF output capacitance of the power amplifier is
compensated by the load impedance.
An optimum load impedance of:
Z
7.5 dBm.
The load impedance is defined as the impedance seen from the PLL transmitter block’s ANT1,
ANT2 into the matching network. Do not confuse this large signal load impedance with a small
signal input impedance delivered as input characteristic of RF amplifiers and measured from the
application into the IC instead of from the IC into the application for a power amplifier.
Less output power is achieved by lowering the real parallel part of 465Ω where the parallel imag-
inary part should be kept constant.
Output power measurement can be done with the circuit shown in
that the component values must be changed to compensate the individual board parasitics until
the PLL transmitter block has the right load impedance Z
ing of the cable used to measure the output power must be calibrated.
Load
S
= 465Ω || j/(2 × π 1.0 pF) = (166 + j223)Ω thus results for the maximum output power of
to deliver the DC current.
4
= 9.2 pF ±2%, C
0
= 3.2 pF ±10% and a crystal with C
Tolerances of Frequency Modulation
XTAL
V
5
S
~
= 6.8 pF ±5%, a switch port with C
C
Stray1
Load,opt
Stray1
Crystal equivalent circuit
C
= (166 + j223)Ω. There must be a low resistive path
= C
M
L
Stray2
C
M
0
M
= 13 fF ±10%, an FSK deviation of ±21 kHz
R
= 1 pF ±10%, a parallel capacitance of the
S
Load,opt
C
Stray2
Switch
C
= (166 + j223)Ω. Also the damp-
5
Figure 7-2 on page
C
= 3 pF ±10%, stray capaci-
Switch
C
4
ATAM862-4
8. Note
7