PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 200

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
Table 11: CLOCK MODULE REGISTERS
PNX15XX_PNX952X_SER_N_4
Product data sheet
Bit
Offset 0x04,7514-FDC
Interrupt Registers
Offset 0x04,7FE0
31
30
29
28
27
26:5
4
3
2
1
0
Offset 0x04,7FE4
31:5
4
3
2
1
9:8
7:6
5:4
3:2
1:0
Symbol
Aligner_adjust_area2
Aligner_adjust_area1
Aligner_adjust_l_area0
Aligner_adjust_e_area0
Aligner_adjust
VDO_CLK2_present
VDI_CLK2_present
ao_sckin_present
ai_sckin_present
VDI_CLK1_present
Reserved
VDO_CLK2 (clk_fgpo)
VDI_CLK2 (clk_fgpi)
AO_SCK
AI_SCK
VDI_CLK1 (clk_vip)
Reserved
VDO_CLK2 (clk_fgpo)
VDI_CLK2 (clk_fgpi)
AO_SCK
AI_SCK
RESERVED
INTERRUPT STATUS
INTERRUPT ENABLE
Acces
s
R
R
R
R
R
R/W
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W1
R/W1
R/W1
R/W1
R/W1
…Continued
Value
0
0
0
0
0
-
0
0
0
0
0
-
0
0
0
0
10
10
10
10
10
Rev. 4.0 — 03 December 2007
Description
Adjust the aligner for the clock going to area 2
Adjust the aligner for the clock going to area 1
Adjust the aligner for the late clock going to area 0
Adjust the aligner for the early clock going to area 0
Adjust the aligner for the 3ns aligner
The below values apply to each of the above except the 25:24 bits
11 : adds to the clock latency
01, 10 : medium clock latency (default)
00 : decreases the clock latency
1: Clock present
0: Clock NOT present
1: Clock present
0: Clock NOT present
1: Clock present
0: Clock NOT present
1: Clock present
0: Clock NOT present
1: Clock present
0: Clock NOT present
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
1: Clock interrupt
1: Clock interrupt
1: Clock interrupt
1: Clock interrupt
1: Clock interrupt
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
1: Interrupt enabled
0: Interrupt NOT enabled
1: Interrupt enabled
0: Interrupt NOT enabled
1: Interrupt enabled
0: Interrupt NOT enabled
1: Interrupt enabled
0: Interrupt NOT enabled
PNX15xx/952x Series
Chapter 5: The Clock Module
© NXP B.V. 2007. All rights reserved.
5-200