PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 696

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
4. Descriptor and Status Formats
PNX15XX_PNX952X_SER_N_4
Product data sheet
Figure 4:
Receive descriptor memory layout
RxDescriptorNumber
RxDescriptor
4.1 Receive Descriptors and Status
1
2
3
4
5
Table 3: PatternMatchJoin Register Nibble Functions
This section defines the descriptor format for the transmit and receive scatter/gather
DMA engines.
Each Ethernet packet can be broken into a set of fragments . Each fragment will have
a single corresponding descriptor. The DMA managers in the LAN100 can scatter (for
receive) and gather (for transmit) multiple fragments into a single Ethernet packet.
Figure 4
The receive descriptors are stored in an array in memory. The base address of the
array is stored in the RxDescriptor register. The number of descriptors in the array is
stored in the RxDescriptorNumber register using a minus-one encoding format. For
example, if the array has 8 elements, the RxDescriptorNumber register value should
Nibble (binary)
1011
1100
1101
1110
1111
b
b
b
b
b
depicts the layout of the receive descriptors in memory.
Control
Control
Control
Control
Control
Control
Packet
Packet
Packet
Packet
Packet
Packet
Rev. 4.0 — 03 December 2007
Name
b
!a
!b
0
1
Chapter 23: LAN100 — Ethernet Media Access Controller
Data Buffer
Data Buffer
Data Buffer
Data Buffer
Data Buffer
Data Buffer
Function
Feedthrough b
Invert a
Invert b
Fix match output to zero
Fix match output to one
RxStatus
PNX15xx/952x Series
…Continued
StatusTimeStamp
StatusTimeStamp
StatusTimeStamp
StatusTimeStamp
StatusTimeStamp
StatusTimeStamp
StatusInfo
StatusInfo
StatusInfo
StatusInfo
StatusInfo
StatusInfo
© NXP B.V. 2007. All rights reserved.
23-696