PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 91
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PNX1500E
Manufacturer Part Number
PNX1500E
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1500E.pdf
(828 pages)
Specifications of PNX1500E
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NXP Semiconductors
Volume 1 of 1
Table 4: TM3260 Characteristics
PNX15XX_PNX952X_SER_N_4
Product data sheet
TM3260 VLIW CPU Features
ISA
Instructions
Data types
Functional units
Caches
Cache policies
Line size
MMU
Protection
Multipliers
Debug
Register file
Interrupts
Timers
System Interface
Software
Development
Environment
Application Software
Architecture
PNX1300 Series, with 32-bit RISC style load/store/compute instruction set and an extensive set of
8-, 16-bit SIMD multimedia instructions
5 RISC or SIMD instructions every clock cycle
boolean, 8-, 16- and 32-bit signed and unsigned integer, 32-bit IEEE floats
5 CONST, 5 Integer ALU’s, 5 multi-bit SHIFTERs, 3 DSPALU’s, 2 DSPMUL, 2 IFMUL, 2 FALU, 1
FCOMP, 1 FTOUGH (divide, sqrt) 3 BRANCH, 2 LD/ST
64 KB 8-way set associative ICache
16 KB 8-way set associative dual-ported Dcache
critical word first refill, write-back, write-allocate, automatic heuristic hardware prefetch
64 bytes (both ICache and DCache)
none, virtual = physical, full 4 GB space supported
Base, limit style protection, where CPU can be set to only use part of system DRAM, and hardware
ensures no references take place outside this range
up to 2 32x32-bit integer multiplies per clock
up to 2 32-bit IEEE floating point multiplies per clock
up to 4 16x16-bit multiply-adds per clock
up to 8 8x8-bit multiplies per clock
JTAG based software debugger, including hardware breakpoints for instruction and data addresses
128 entry 32-bit register file
64 auto-vectoring interrupts, with 8 programmable priority levels
Four 32-bit timers/counters are provided. A wide selection of sources allows them to be used for
performance analysis, real-time interrupt generation and/or system event counting
The TM3260 runs asynchronously with respect to system DRAM, and can operate at a frequency
lower than system DRAM to save power, or higher than system DRAM to gain performance
The TM3260 is supported by the advanced C/C++ compiler tools available for the PNX1300 Series
family
Applications use the TSSA, Trimedia Streaming Software Architecture, allowing modular
development of audio, video processing functions
The TM3260 is responsible for all media processing and real-time processing
functions within the PNX15xx/952x Series. It runs a small real-time operating system,
pSOS, which allows it to respond efficiently and predictably to real-time events.
The TM3260 is capable of operating in little or big-endian mode. The mode is chosen
shortly after CPU startup by setting the endian bit in the Program Control Status
Word (PCSW).
Debug of software running on TM3260 is performed using an interactive source
debugger with a PC JTAG plug-in board. The PC talks to the TM3260 through the
PNX15xx/952x Series JTAG pins. The TMDBG module provides an improved version
of the PNX1300 Series JTAG debug port. The PNX15xx/952x Series is in standalone
mode.
TM3260 media processor features are presented bellow.
Rev. 4.0 — 03 December 2007
PNX15xx/952x Series
Chapter 2: Overview
© NXP B.V. 2007. All rights reserved.
2-91
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