PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 779
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PNX1500E
Manufacturer Part Number
PNX1500E
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1500E.pdf
(828 pages)
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1.
PNX15XX_PNX952X_SER_N_4
Product data sheet
All references to “Set A” registers also apply equally to “Set B”.
The combination of these three basic algorithms operate together in the arbiter as
shown in
The TDMA timing wheel is implemented with 128 entries, numbered 1 to 128. The
TDMA_entries field in the NR_entries_A
entries that are used. TDMA entries higher than this value will be ignored. If the
TDMA_entries is greater than 128 then all 128 entries are used, but no more. If
TDMA_entries is set to zero then the TDMA timing wheel is not used for arbitration.
The priority list is implemented with 16 entries, numbered 1 to 16. The
Priority_entries field in the NR_entries_A register will determine the actual number of
entries that are used. If a value greater than 16 is written all 16 entries are used, but
no more. If the Priority_entries is set to zero then the priority list is not used for
arbitration.
The round robin #1 list is implemented with 16 entries, numbered 1 to 16. The
round_robin1_entries
number of entries that are used. If a value greater than 16 is written all 16 entries are
used, but no more. If the
is not used for arbitration.
The round robin #2 list is implemented with 8 entries, numbered 1 to 8. The
round_robin2_entries
number of entries that are used. If a value greater than 8 is written all 8 entries are
used, but no more. If the
is not used for arbitration.
Figure 1:
Figure
Arbitration Scheme
Rev. 4.0 — 03 December 2007
1.
field in the NR_entries_A register will determine the actual
field in the NR_entries_A register will determine the actual
Timing Wheel
round_robin1_entries
round_robin2_entries
TDMA
high
low
round robin #1
round robin #2
priority list
1
register will determine the actual number of
is set to zero then the round robin #1 list
is set to zero then the round robin #2 list
PNX15xx/952x Series
highest
lowest
overall priority
Chapter 26: Memory Arbiter
© NXP B.V. 2007. All rights reserved.
26-779
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