PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 553
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PNX1500E
Manufacturer Part Number
PNX1500E
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1500E.pdf
(828 pages)
Specifications of PNX1500E
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4. Signal Description
Table 4: SPDIF Out External Signals
5. Register Descriptions
PNX15XX_PNX952X_SER_N_4
Product data sheet
Signal
SPDO
Type
O
Description
SPDIF output. Self clocking interface carrying either two-channel PCM data with samples up to 24 bits,
or encoded Dolby Digital (AC-3) or MPEG audio data for decoding by an external AC3 or MPEG
capable audio amplifier.
3.5 Endian Mode
4.1 External Interface
5.1 Register Summary
The occurrence of this event represents a precise, periodic time interval which can be
used by system software for audio/video synchronization.
The SPDIF descriptor is a 32-bit word memory data structure,
An external circuit as shown in
output and convert the 3.3 Volt output pin to a drive level of 0.5 V peak-peak into a 75
Ohm load, as required for consumer applications of IEC-60958.
The base address for the PNX15xx/952x Series SPDIF Output Port module is 0x10
9000.
Table 5: SPDIF Output Module Register Summary
Offset
0x10 9000
0x10 9004
0x10 9008
0x10 900C
Figure 3:
•
BUF_DONE - signals when the last word of a memory buffer is being requested
by the SPDO module. Note that this event is not dependent upon memory bus
latency.
Suggested External SPDIF Output Interface Circuitry
Rev. 4.0 — 03 December 2007
PNX15xx/
Name
SPDO_STATUS
SPDO_CTL
Reserved
SPDO_BASE1
SPDO
Figure 3
10 uF
110 ohm
240 ohm
is required to provide an electrically isolated
Description
SPDIF Out Status
SPDIF Out general control register
Base address of buffer1
transformer
1.5 - 7 MHz
PNX15xx/952x Series
1:1
Chapter 17: SPDIF Output
phono
RCA
© NXP B.V. 2007. All rights reserved.
17-553
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