PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 407

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
Table 20: QVCP 1 Registers
PNX15XX_PNX952X_SER_N_4
Product data sheet
Bit
Offset 0x10 E208
31:23
12:0
Offset 0x10 E20C
31:28
27:0
Offset 0x10 E210
31:23
22:0
Offset 0x10 E214
31:8
7:0
Offset 0x10 E218
31:28
27:0
Offset 0x10 E21C
31:28
27:0
Offset 0x10 E220
31:16
15:0
Symbol
Unused
Layer N Source Width
Unused
Layer N Source Address
B
Unused
Layer N Pitch B
Unused
DCnt
Unused
Layer Source Address A
Semi Planar UV
Unused
Layer Source Address B
Semi Planar UV
Unused
Line Increment Packed
Layer Source Width (Packed/Semi Planar Y)
Layer Source Address B (Packed/Semi Planar Y)
Layer Source Pitch B (Packed/Semi Planar Y)
Dummy Pixel Count
Layer Source Address A (Semi Planar UV)
Layer Source Address B (Semi Planar UV)
Line Increment (Packed)
…Continued
Acces
s
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
0
-
0
-
0
-
0
-
0
-
0
-
0xFFFFh This register determines whether a layer line is repeatedly fetched
Value
Rev. 4.0 — 03 December 2007
Description
Layer N source width in bytes. For semi planar and planar modes
this determines the source data with in bytes for the Y plane. The
value has to be rounded up to the next 64-bit word.
Layer N Source Data Start Address B in bytes. This sets starting
address B for data transfers from the linear Frame Buffer memory to
Layer N. For semi planar and planar modes this address points to
the Y plane.
Note: It should be aligned on a 128-byte boundary. It has to be
8-byte aligned.
Layer N Source Data Pitch B in bytes sets pitch B for data transfers
from the linear Frame Buffer memory to Layer N. For semi planar
and planar modes this determines the pitch for the Y plane.
The value has to be rounded up to the next 64-bit word.
Number of dummy pixels to be inserted between layer video lines
Layer N Source Data Start Address A in bytes. This sets starting
address A for data transfers from the linear Frame Buffer memory to
Layer N. This Register holds the source address for the UV plane in
semi planar modes.
Note: It should be aligned on a 128-byte boundary. It has to be
8-byte aligned.
Layer N Source Data Start Address B in bytes. This sets starting
address B for data transfers from the linear Frame Buffer memory to
Layer N. This Register holds the source address for the UV plane in
semi planar modes.
Note: It should be aligned on a 128-byte boundary. It has to be
8-byte aligned.
from memory or not.
Round Down(2
line is fetched i.e., 0x8000H would fetch each line exactly twice (line
doubling).
16
/(Line Increment Packed))= #of times the same
PNX15xx/952x Series
Chapter 11: QVCP
© NXP B.V. 2007. All rights reserved.
11-407