PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 415

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
Table 20: QVCP 1 Registers
PNX15XX_PNX952X_SER_N_4
Product data sheet
Bit
11:0
Offset 0x10 E2AC
31:28
27:16
15:7
5:0
Offset 0x10 E2B0
31:26
25:16
15:12
11:0
Offset 0x10 E2B4
31:12
11:0
Offset 0x10 E2B8
31:24
Symbol
DPCoeff
Unused
HSRU_d_phase
Unused
HSRU_phase
Unused
HSRU_ddd_phase
Unused
HSRU_dd_phase
Unused
LayerNWidth
Unused
HSRU Phase
HSRU Delta Phase
Layer Size (final)
Output and Alpha manipulation
…Continued
Acces
s
R/W
R/W
R/W
R/W
R/W
R/W
-
-
0
-
0
-
0
-
0
-
0
-
Value
Rev. 4.0 — 03 December 2007
Description
Differential phase coefficient
For the interpolator to work in bypass mode this register has to be
programmed to 0
Unsigned. This delta phase is added with phase with every output
data. Once phase is added with a certain number of d_phases to
get overflowed, then it’s time shift input sample signals.
For the HSRU to work in bypass mode this register has to be
programmed to 0.
Example:
8000 (hex) => upscaling by 2
4000 (hex) => upscaling by 4
Unsigned. This is the initial phase of input pixel phase. It determines
the portions of the first input samples used to generate output
pixels.
Signed. This delta-delta-delta phase is added with delta-delta phase
to make it change. This is used for non-linear scaling ratios.For the
HSRU to work in bypass mode this register has to be programmed
to 0.
Signed. This is the initial delta-delta phase. It is added with delta
phase to make it change. This is used for non-linear scaling ratios.
For the HSRU to work in bypass mode this register has to be
programmed to 0.
Note: Layer Size(final) register has to be modified if HSRU scale
ratio is changed.
final (after scaling) Layer N width, in pixels.
Note: This register has to be programmed to match the final width
after scaling, as given by the equation below.
LINT and HSRU can only crop at most 5 pixels off a scaled image.
Setting this register to a width which is more than 5 pixels smaller
than the scaled width can result in data underflow.
On the other hand, if the final width is greater than the scaled
image, the last pixel will be repeated to fill the final width.
Always remember to update this register if LINT or HSRU scale
values are changed.
•
Final width = (input width)*scaling ratio
PNX15xx/952x Series
Chapter 11: QVCP
© NXP B.V. 2007. All rights reserved.
11-415