PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 78

PNX1500E

Manufacturer Part Number
PNX1500E
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PNX1500E

Lead Free Status / Rohs Status
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NXP Semiconductors
Volume 1 of 1
11. Miscellaneous
12. Soft Errors Due to Radiation
PNX15XX_PNX952X_SER_N_4
Product data sheet
10.4 Package Handling, Soldering and Thermal Properties
and the bar of the ‘T’ (this applies when the signal has two or more loads). For single
loaded tracks and bi-directional signals, the parallel termination resistor should be
placed about 50% of the way to the DDR SDRAM device. For unidirectional signals
and single loaded tracks, the termination should be placed after the pin of DDR
SDRAM device. In this case, the VTT supply must be carefully designed with very
wide tracks since the current through that power supply is very high due to the
termination and its active current consumption over 80+ pins. The VTT power island
should be capable to sink up to 3 A. Other VTT termination connections can used like
advertised by DDR manufacturers. For example placing the VTT power island at the
end of the bus, i.e. after the DDR devices, is usually easier for the board designer.
Termination resistors should be as close as possible to the VTT generator. Similar
decoupling as for the VCCM power plane is required.
MM_CKE must not be parallel terminated since it requires a 0V level at initialization
time.
Similarly for signal integrity purpose, it is possible to only series terminate the
address, the command lines, and the data lines (at the PNX1500 side). There is no
need for series termination if the parallel termination was chosen.
Up to date information can be found at
http://www.nxp.com/package
In order to limit clock jitter on the TM3260 and DDR clocks, it is recommended to
shutdown the clocks of the unused modules, typically by programming these modules
to enter the powerdown mode and switch the others to their functional clocks (i.e.
switch the module’s clocks to a frequency higher than the default 27 MHz crystal
clock when possible).
Soft errors can be caused by radiation, electromagnetic interference, or electrical
noise. This section reports the soft error rate (SER) caused by the radiation
component.
There are three primary radiation sources namely alpha particles, high-energy
cosmic rays, and neutron-induced boron fission. Alpha particles originate from
radioactive impurities in chip and package materials. Cosmic rays indirectly generate
charges by colliding with nuclei within the chip. The boron fission occurs when a low-
energy (thermal) neutron hits a 10B nucleus, which then breaks up into an alpha and
lithium recoil. The SER generated by these radiation sources is of 9900 Failure-In-
Time (FIT) which is equivalent to one failure every 10 years.
In the PNX1500, the SER is statistically improved since some of the memory
elements (that are affected by the radiation) may contain pixel data rather than control
data which further extends the SER.
Rev. 4.0 — 03 December 2007
PNX15xx/952x Series
Chapter 1: Integrated Circuit Data
© NXP B.V. 2007. All rights reserved.
1-78

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