GD82559C S L3DF Intel, GD82559C S L3DF Datasheet - Page 19

• Manufacturer Part Number: GD82559C S L3DF
• Manufacturer: Intel

Specifications of GD82559C S L3DF

• Lead Free Status / Rohs Status: Not Compliant

Datasheet
FLA[7]/
CLKEN
FLA[6:2]
FLA[1]/
AUXPWR
FLA[0]/
PCIMODE#
EECS
FLCS#/AEN
FLOE#
FLWE#
CFCS#
CFCLK
Symbol
T/S
OUT
T/S
T/S
OUT
OUT
OUT
OUT
OUT
OUT
Type
Flash Address[7]/Clock Enable. This is a multiplexed pin and acts
as the Flash Address[7] output signal during nominal operation. When
the PCI Reset signal is active, this pin acts as input control over the
FLA[16]/CLK25 output signal. If the FLA[7]/CLKEN pin is connected to
a pull-up resistor (3.3 KΩ), a 25 MHz clock signal is provided on the
FLA[16]/CLK25 output; otherwise, it is used as FLA[16] output. This
pin should be left floating if the Flash and 25 MHz clock output are not
used.
Flash Address[6:2]. These pins are used as Flash address outputs
to support 128 Kbyte Flash addressing. If the modem is enabled,
these pins carry modem address bits 6:2. This pin should be left
floating if the Flash and modem functionality are not used.
Flash Address[1]/Auxiliary Power. This multiplexed pin acts as the
Flash Address[1] output signal during nominal operation. If the modem
is enabled, this pin carries modem address bit 1. When RST# is active
(low), it acts as the power supply indicator. If the 82559 is fed PCI
power, this pin should be connected to the Flash Address 1 (of the
Flash component) signal or left floating if Flash is not present. If the
82559 is fed by auxiliary power, this pin should be connected to a pull-
up resistor.
Flash Address [0]/PCI Mode. This multiplexed pin acts as the Flash
Address[0] output signal during nominal operation. If the modem is
enabled, this pin carries modem address bit 0. When RST# is active
(low), it acts as the input system type. If the 82559 is used in a
CardBus system, this pin should be connected to a pull-up resistor
(3.3 KΩ); otherwise, the 82559 considers the host as a PCI system.
This pin should be left floating if the Flash and modem functionality are
not used.
EEPROM Chip Select. The EEPROM Chip Select signal is used to
assert chip select to the serial EEPROM.
Flash Chip Select/Address Enable. The Flash Chip Select signal is
active during Flash. In modem mode, it acts as an ISA-like Address
Enable signal (modem chip select). This pin should be left floating if
the Flash and modem functionality are not used.
Flash Output Enable. This pin provides an active low output enable
control (read) to the Flash memory. If the modem is enabled, this is an
active-low output enable (read) of the modem. This pin should be left
floating if the Flash and modem functionality are not used.
Flash Write Enable. This pin provides an active low write enable
control to the Flash memory. If the modem is enabled, this is an active
low write-enable to the modem. This pin should be left floating if the
Flash and modem functionality are not used.
Security ASIC Chip Select. This pin provides an active low function
enable to enable/disable Flash memory in Combo designs. This signal
is asserted high to enable Flash memory in LAN/modem designs. If
this signal is asserted low, the modem device is enabled, and local bus
signals are defined for modem. This pin is controlled by setting/
clearing the Boot Enable bit in the BootROM BAR. This bit is set
following a PCI reset enabling external Flash.
Security ASIC Clock. This pin provides a clock out to a companion
ASIC residing on the local bus. This pin should be left unconnected in
designs that do not utilize a companion ASIC on the Flash interface.
Name and Function
Networking Silicon — 82559
11