GD82559C S L3DF Intel, GD82559C S L3DF Datasheet - Page 99

• Manufacturer Part Number: GD82559C S L3DF
• Manufacturer: Intel

Specifications of GD82559C S L3DF

• Lead Free Status / Rohs Status: Not Compliant

10.3.7
10.3.8
10.3.9
10.3.10
10.3.11
Datasheet
Register 22: Receive Symbol Error Counter Bit Definitions
Register 23: 100BASE-TX Receive Premature End of Frame Error
Counter Bit Definitions
Register 24: 10BASE-T Receive End of Frame Error Counter Bit
Definitions
Register 25: 10BASE-T Transmit Jabber Detect Counter Bit
Definitions
Register 26: Equalizer Control and Status Bit Definitions
15:0
15:0
15:0
15:0
15:0
Bit(s)
Bit(s)
Bit(s)
Bit(s)
Bit(s)
Symbol Error
Counter
Premature End of
Frame
End of Frame
Counter
Jabber Detect
Counter
RFU
Name
Name
Name
Name
Name
This field contains a 16-bit counter that increments for
each symbol error. The counter freezes when full and
self-clears on read.
In a frame with a bad symbol, each sequential six bad
symbols count as one.
This field contains a 16-bit counter that increments for
each premature end of frame event. The counter
freezes when full and self-clears on read.
This is a 16-bit counter that increments for each end
of frame error event. The counter freezes when full
and self-clears on read.
This is a 16-bit counter that increments for each
jabber detection event. The counter freezes when full
and self-clears on read.
Reserved for Future Use
Description
Description
Description
Description
Description
Networking Silicon — 82559
Default
Default
Default
Default
Default
--
--
--
--
--
RO
SC
RO
SC
RO
SC
RO
SC
RW
R/W
R/W
R/W
R/W
R/W
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