GD82559C S L3DF Intel, GD82559C S L3DF Datasheet - Page 55
GD82559C S L3DF
Manufacturer Part Number
GD82559C S L3DF
Description
Manufacturer
Intel
Datasheet
1.GD82559C_S_L3DF.pdf
(120 pages)
Specifications of GD82559C S L3DF
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Datasheet
Figure 15. Auto-Negotiation and Parallel Detect
will perform Auto-Negotiation or Parallel Detection with no data packets being transmitted.
Connection is then established either by FLP exchange or Parallel Detection. The PHY unit will
look for both FLPs and link integrity pulses. The following diagram illustrates this process.
LED Description
The PHY unit supports three LED pins to indicate link status, network activity and network speed.
Each pin can source 10 mA.
MDI register 27 in
details the information for LED function mapping and support enhancements.
•
•
•
Link: This LED is off until a valid link has been detected. After a valid link has been detected,
the LED will remain on (active-low).
Activity: This LED blinks on and off when activity is detected on the wire.
Speed: This LED will be on if a 100BASE-TX link is detected and off if a 10BASE-T link is
detected. If the link fails while in Auto-Negotiation, this LED will keep the last valid link state.
If 100BASE-TX link is forced this LED will be on, regardless of the link status. This LED will
be of if the 10BASE-T link is forced, regardless of the link status.
Auto-Negotiation capable = 0
Section 10.3.12, “Register 27: PHY Unit Special Control Bit
Look at Link Pulse;
Parallel Detection
100Base-TX Link
10Base-T or
Ready
Auto-Negotiation Complete bit set
parallel detect or auto-
Ability detect either by
negotiation.
LINK PASS
Force_Fail
FLP capable
Auto-Negotiation
Auto-Negotiation capable = 1
Networking Silicon — 82559
Ability Match
Definitions”
47
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