GD82559C S L3DF Intel, GD82559C S L3DF Datasheet - Page 44

• Manufacturer Part Number: GD82559C S L3DF
• Manufacturer: Intel

Specifications of GD82559C S L3DF

• Lead Free Status / Rohs Status: Not Compliant

82559 — Networking Silicon
4.8
36
Table 1.
Note: The IA read from the EEPROM is used by the 82559 until an IA Setup command is issued by
EEPROM Words Field Descriptions
software. The IA defined by the IA Setup command overrides the IA read from the EEPROM.
10/100 Mbps CSMA/CD Unit
The 82559 CSMA/CD unit implements both the IEEE 802.3 Ethernet 10 Mbps and IEEE 802.3u
Fast Ethernet 100 Mbps standards. It performs all the CSMA/CD protocol functions such as
transmission, reception, collision handling, etc. The 82559 CSMA/CD unit interfaces the internal
PHY unit through a standard Media Independent Interface (MII), as specified by IEEE 802.3,
Chapter 22. This is a 10/100 Mbps mode in which the data stream is nibble-wide and the serial
clocks run at either 25 or 2.5 MHz.
Word
AH, 6
Word
AH, 5
Word
AH, 4:3
Word
AH, 2
Word
AH, 1
Word
AH, 0
Word
DH,
11:8
Word,
DH, 7:0
Words
FBH -
FEH
Bits
Deep Power
Down
Wake on LAN
Reserved
Standby Enable
Modem
Heartbeat Packet
Pointer
SMB Address
Field/EEPROM
CIS Pointer
Modem
Configuration
Parameters
Name
This bit either enables or disables Deep Power Down in the D2 or D3 states
when PME is disabled:
‘0’ Deep Power Down is enabled in D3 state if PME-Disabled
‘1’ Deep Power Down disabled in D3 state when PME-Disabled.
Note: When using the 82559’s Alert capability, the Deep Power Down capability
should be disabled. Alert devices will not be able to transmit or receive on the
SMBus if the device is in a Deep Power Down Mode.
The WOL bit sets the 82559 into WOL mode. When in this mode the 82559
reads three additional words from the EEPROM, word addresses 0H, 1H, and
2H. These words are expected to hold the MAC Individual Address. After
reading these words the 82559 wakes the system by asserting PME# when a
wake-up packet is received. Default value is 0b.
These are reserved and should be set to 00b.
The Standby Enable bit enables the 82559 to enter standby mode. When this bit
equals 1b, the 82559 is able to recognize an idle state and can enter standby
mode (some internal clocks are stopped for power saving purposes). The
82559 does not require a PCI clock signal in standby mode. If this bit equals 0b,
the idle recognition circuit is disabled and the 82559 always remains in an active
state. Thus, the 82559 will always request PCI CLK using the Clockrun
mechanism.
If this bit equals 0b, the design is a single function design (LAN function) only. If
this bit equals 1b, a modem is attached on the 82559 local parallel port.
This field of bits contains the location of the Heartbeat packet within the
EEPROM. The pointers are expressed in a granularity of 16 words. A value of 0
is used as a null pointer.
This field of bits is a multiplexed function field. In a PCI system, it acts as an
SMB address field (7-bit field). When this field is used as the SMB address field,
bit 7 equals 0b.
In a CardBus system, this field is used for CIS pointers. When this field is used
as the EEPROM CIS Pointer, it contains two 4-bit pointers that point to the
location of the CIS information within the EEPROM. The pointers are expressed
in a granularity of 16 words. A value of 0 is used as a null pointer. The Ethernet
CIS pointer resides in bits 3:0 and the modem CIS pointer resides in bits 7:4.
These word fields hold the modem configuration parameters are loaded to the
PCI Configuration space. A combination LAN/modem card requires a 256-word
EEPROM.
Description
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