GD82559C S L3DF Intel, GD82559C S L3DF Datasheet - Page 51

• Manufacturer Part Number: GD82559C S L3DF
• Manufacturer: Intel

Specifications of GD82559C S L3DF

• Lead Free Status / Rohs Status: Not Compliant

5.1.3.5
5.1.4
5.1.5
5.1.5.1
5.1.5.2
5.1.6
Datasheet
100BASE-TX Receive Error Detection and Reporting
In 100BASE-TX mode, the PHY unit can detect errors in receive data in a number of ways. Any of
the following conditions is considered an error:
When any of the above error conditions occurs, the PHY unit immediately asserts its receive error
indication to the CSMA unit. The receive error indication is held active as long as the receive error
condition persists on the receive pair.
100BASE-TX Collision Detection
100BASE-TX collisions in half duplex mode only are detected similarly to 10BASE-T collision
detection, via simultaneous transmission and reception.
100BASE-TX Link Integrity and Auto-Negotiation Solution
The 82559 Auto-Negotiation function automatically configures the device to the technology,
media, and speed to operate with its link partner. Auto-Negotiation is widely described in IEEE
specification 802.3u, clause 28. The PHY unit supports 10BASE-T half duplex, 10BASE-T full
duplex, 100BASE-TX half duplex, and 100BASE-TX full duplex.
The PHY unit has two Physical Media Attachment (PMA) technologies with its link integrity
function, 10BASE-T and 100BASE-TX.
Link Integrity
In 100BASE-TX, the link integrity function is determined by a stable signal status coming from the
TP-PMD block. Signal status is asserted when the PMD detects breaking squelch energy and the
right bit error rate according to the ANSI specification.
Auto-Negotiation
The PHY unit fully supports IEEE 802.3u, clause 28. The technology, 10BASE-T or 100BASE-
TX, is determined by the Auto-Negotiation result.
Speed and duplex auto-select are functions of Auto-Negotiation. However, these parameters may
be manually configured via the MII management interface (MDI registers).
Auto 10/100 Mbps Speed Selection
The MAC may either allow the PHY unit to automatically select its operating speed or force the
PHY into 10 Mbps or 100 Mbps mode. The Management Data Interface (MDI) can control the
PHY unit speed mode.
•
•
•
•
Link integrity fails in the middle of frame reception.
The Start of Stream Delimiter (SSD) “JK” symbol is not fully detected after idle.
An invalid symbol is detected at the 4B/5B decoder.
Idle is detected in the middle of a frame (before “TR” is detected).
Networking Silicon — 82559
43