GD82559C S L3DF Intel, GD82559C S L3DF Datasheet - Page 97

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GD82559C S L3DF

Manufacturer Part Number
GD82559C S L3DF
Description
Manufacturer
Intel
Datasheet

Specifications of GD82559C S L3DF

Lead Free Status / Rohs Status
Not Compliant
10.3.2
Datasheet
Register 17: PHY Unit Special Control Bit Definitions
9
8
7:2
1
0
15
14
13
12
11
10
9
8
7
6
5
4
3
Bit(s)
Bit(s)
10BASE-T
Power-Down
Polarity
Reserved
Speed
Duplex Mode
Scrambler By-
pass
By-pass 4B/5B
Force Transmit H-
Pattern
Force 34 Transmit
Pattern
Good Link
Reserved
Transmit Carrier
Sense Disable
Disable Dynamic
Power-Down
Auto-Negotiation
Loopback
MDI Tri-State
Filter By-pass
Auto Polarity
Disable
Squelch Disable
Name
Name
This bit indicates the power state of 100BASE-TX
PHY unit.
1 = Power-Down
0 = Normal operation
This bit indicates 10BASE-T polarity.
1 = Reverse polarity
0 = Normal polarity
These bits are reserved and should be set to 0B.
This bit indicates the Auto-Negotiation result.
1 = 100 Mbps
0 = 10 Mbps
This bit indicates the Auto-Negotiation result.
1 = Full Duplex
0 = Half Duplex
1 = By-pass Scrambler
0 = Normal operations
1 = 4 bit to 5 bit by-pass
0 = Normal operation
1 = Force transmit H-pattern
0 = Normal operation
1 = Force 34 transmit pattern
0 = Normal operation
1 = 100BASE-TX link good
0 = Normal operation
This bit is reserved and should be set to 0b.
1 = Transmit Carrier Sense disabled
0 = Transmit Carrier Sense enabled
1 = Dynamic Power-Down disabled
0 = Dynamic Power-Down enabled (normal)
1 = Auto-Negotiation loopback
0 = Auto-Negotiation normal mode
1 = MDI Tri-state (transmit driver tri-states)
0 = Normal operation
1 = By-pass filter
0 = Normal filter operation
1 = Auto Polarity disabled
0 = Normal polarity operation
1 = 10BASE-T squelch test disable
0 = Normal squelch operation
Description
Description
Networking Silicon — 82559
Default
000000
Default
--
--
--
1
0
0
0
0
0
0
0
0
0
0
0
0
0
RO
RO
RO
RO
RO
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R/W
R/W
89

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