GD82559C S L3DF Intel, GD82559C S L3DF Datasheet - Page 38
GD82559C S L3DF
Manufacturer Part Number
GD82559C S L3DF
Description
Manufacturer
Intel
Datasheet
1.GD82559C_S_L3DF.pdf
(120 pages)
Specifications of GD82559C S L3DF
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82559 — Networking Silicon
30
Figure 10. 82559 Initialization Upon PCI RST# and ISOLATE#
The behavior of the PCI RST# signal and the internal 82559 initialization signal are shown in the
figure below.
The tables below summarizes the 82559’s functionality and power consumption at the different
power states.
NOTE: All values shown for the D3 state assume the availability of 3.3 V standby available to the device.
D0
D0
D0
D0u
D2/D3 (link
down)
Dx (x>0 with
PME# disabled)
WOL
Power State
PCI RST#
Internal hardware
reset
PCI RST#
Internal hardware
reset
ISOLATE#
Internal hardware
reset
Maximum
Average (5 Mbps)
Dynamic standby
(with network load)
CardBus with PCI CLK
PCI CLK
Without PCI CLK
PCI CLK
Without PCI CLK
Wake on LAN power down
Conditions
D0 - D2 power state
Internal reset
due to ISOLATE#
D3 power state
175 mA
125 mA
120 mA
< 70 mA
10 mA
3 mA
10 mA
3 mA
< 3 mA
100 Mbs
640 ns
640 ns
140 mA
115 mA
55 mA
< 70 mA
10 mA
3 mA
10 mA
3 mA
< 3 mA
10 Mbs
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