GD82559C S L3DF Intel, GD82559C S L3DF Datasheet - Page 89

• Manufacturer Part Number: GD82559C S L3DF
• Manufacturer: Intel

Specifications of GD82559C S L3DF

• Lead Free Status / Rohs Status: Not Compliant

9.3
9.3.1
Datasheet
Table 23. 82558 Statistical Counters
The Statistical Counters are initially set to zero by the 82559 after reset. They cannot be preset to
anything other than zero. The 82559 increments the counters by internally reading them,
incrementing them and writing them back. This process is invisible to the CPU and PCI bus. In
addition, the counters adhere to the following rules:
The CPU can access the counters by issuing a Dump Statistical Counters SCB command. This
provides a “snapshot”, in main memory, of the internal 82559 statistical counters. The 82559
supports 21 counters. The dump could consist of the either 16, 19, or all 21 counters, depending on
the status of the Extended Statistics Counters and TCO Statistics configuration bits in the
Configuration command.
Modem Control/Status Registers
Access to modem based memory or I/O ports are mapped to a cycle to the modem with the lowest
16 addresses of the PCI address space mapped to the address bus of the modem, which is connected
to FLA[3:0].
Modem Base Memory Addressing
The modem base memory addressing is an 8-byte address space. There are three types of address
spaces:
•
•
•
•
•
72
76
78
ID
The counters are wrap-around counters. After reaching FFFFFFFFH the counters wrap around
to 0.
The 82559 updates the required counters for each frame. It is possible for more than one
counter to be updated as multiple errors can occur in a single frame.
The counters are 32 bits wide and their behavior is fully compatible with the IEEE 802.1
standard. The 82559 supports all mandatory and recommend statistics functions through the
status of the receive header and directly through these Statistical Counters.
Modem chipset address space: 0H to FH
Modem function address space: 80H to FFH (implemented in 82559)
Flow Control Receive Unsupported
Receive TCO Frames
Transmit TCO Frames
Counter
This counter contains the number of MAC Control frames
received by the 82559 that are not Flow Control Pause frames.
These frames are valid MAC control frames that have the
predefined MAC control Type value and a valid address but
has an unsupported opcode.
This counter contains the number of TCO packets received by
the 82559.
This counter contains the number of TCO packets transmitted.
Description
Networking Silicon — 82559
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