L64105 LSI Logic Corporation, L64105 Datasheet - Page 136
L64105
Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
1.L64105.pdf
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Figure 4.79
4-54
Reserved
7
Sequence
Register 239 (0x0EF)
Ignore
End
6
Current Decode Frame [1:0]
Reserved
Reserved
Host Force Broken Link Mode
Panic Prediction Enable
Register Descriptions
Force Rate
Control
5
Concealment
These bits indicate which frame store is being used for
reconstruction as shown in the following table.
Current Display
Frame
0b00
0b01
0b10
0b11
Clear these bits when writing to this register.
Clear this bit when writing to this register.
Setting this bit disables the display of certain B pictures
in a Group of Pictures (GOP) by forcing the Broken Link
bit to 1. If the bitstream indicates an open GOP and this
bit is set, then any B pictures before the first I picture in
the GOP are skipped. The Video Interface, however,
stays synchronized with the display since only one B
picture is skipped per frame display period. This is
different from merely skipping B pictures which skips
each B picture as fast as possible and does not control
the rate of the skip with respect to the display.
Setting this bit causes the motion compensation module
to go into a panic mode. In this mode, the motion
compensation module performs motion compensation
using only the forward vector set and ignores the
backward vectors for B pictures. Similarly for dual-prime
motion vectors, only same parity prediction is performed.
This mode is intended to be used in situations where
limited SDRAM bandwidth slows down picture
Copy Option
4
GOP User
Data Only
3
Description
Anchor 1
Anchor 2
B
Reserved
Prediction
Enable
Panic
2
Broken Link
Host Force
Mode
1
Reserved
R [5:4]
R/W 1
R/W 2
0
[7:6]
0
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