L64105 LSI Logic Corporation, L64105 Datasheet - Page 9

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

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Contents
Register 4 (0x004)
Register 5 (0x005)
Register 6 (0x006)
Register 7 (0x007)
Registers 9–12 (0x009–0x00C) SCR Value [31:0]
Registers 13–16 (0x00D–0x010) SCR
Compare/Capture [31:0]
Register 17 (0x011)
Register 18 (0x012)
Register 19 (0x013)
Registers 20–23 (0x014–0x017)
SCR Compare Audio [31:0]
Register 28 (0x01C) Video Channel Bypass Data [7:0]
Register 29 (0x01D) Audio Channel Bypass Data [7:0]
Register 64 (0x040)
Register 65 (0x41)
Register 66 (0x042) User Data FIFO Output [7:0]
Register 67 (0x043) Aux Data FIFO Output [7:0]
Register 68 (0x044)
Register 69 (0x045)
Registers 72 and 73 (0x048 and 0x049)
Video ES Channel Buffer Start Address [13:0]
Registers 74 and 75 (0x04A and 0x04B)
Video ES Channel Buffer End Address [13:0]
Registers 76 and 77 (0x04C and 0x04D)
Audio ES Channel Buffer Start Address [13:0]
Registers 78 and 79 (0x04E and 0x04F)
Audio ES Channel Buffer End Address [13:0]
Registers 80 and 81 (0x050 and 0x051)
Video PES Header Channel Buffer Start Address [13:0]
Registers 82 and 83 (0x052 and 0x053)
Video PES Header Channel Buffer End Address [13:0]
Registers 88 and 89 (0x058 and 0x059)
Audio PES Header/System Channel Buffer
Start Address [13:0]
Registers 90 and 91 (0x05A and 0x05B) Audio
PES Header/System Channel Buffer End Address [13:0]
Registers 96–98 (0x060–0x062)
Video ES Channel Buffer Write Address [19:0]
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