L64105 LSI Logic Corporation, L64105 Datasheet - Page 285

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

8.5.5 Force Broken Link
8.5.6 Search for Next GOP/Seq Command
8.5.7 Reconstruction Force Rate Control
The L64105 automatically skips all B pictures before the first I picture in
an open Group of Pictures (GOP) if the Broken Link bit in the bitstream
is set. The host can force this feature in an open GOP regardless of the
bitstream broken-link bit by setting the Host Force Broken Link Mode bit
in Register 239
Video Decoder when it encounters the next GOP after skipping.
The host must set the force bit before the next GOP header is
encountered in the bitstream in order for this command to apply to the
next GOP. The Video Decoder stays synchronized with the display
because only one B picture is skipped per frame display period.
When the host sets the Host Search Next GOP/Seq Command bit in
Register 240
all header and data bytes until it recognizes the next Sequence or GOP
header, whichever comes first. When it finds the header, the Video
Decoder clears the search bit.
Since the Video Decoder reads this bit just before starting reconstruction
of each frame, the display automatically freezes on the last field of the
currently displayed or previous frame if the bit is set. Note that, unlike the
skip feature, picture start code interrupts are generated but no header
data is written to the Auxiliary Data FIFO for the pictures that are
skipped.
With a 3-frame store SDRAM storage scheme, all B pictures are
reconstructed to frame store A3. The display of these B pictures takes
place approximately one field time after their reconstruction starts. When
decoding and displaying a series of consecutive B pictures, steps need
to be taken to make sure that the contents of A3 are not overwritten by
reconstruction before they are displayed. The decoder is capable of
automatically using its internal rate control mechanism to control the rate
of reconstruction. The internal rate control stalls the decoder if
reconstruction is about to overwrite SDRAM contents that have not been
displayed. Specifically, the automatic rate control is turned on during the
first field display time whenever the frame store for reconstruction and
Trick Modes
(page
(page
4-56), the Video Decoder stops decoding and skips
4-54). This bit is automatically cleared by the
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