L64105 LSI Logic Corporation, L64105 Datasheet - Page 334

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L64105

Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
10.2 Audio Decoder Overview
10-2
Figure 10.1
select one of seven modes of decoder operation by programming the
Audio Decoder Mode Select [2:0] bits in Register 357
Important:
Audio Decoder Module
Linear PCM Decoder
MPEG Formatter
DAC Interface
S/P DIF Interface
Decodes 1 or 2 channels. Higher channel data is discarded.
Sampling Frequencies (Fs) = 48 kHz or 96 kHz (96 kHz is
decimated to 48 kHz for the IEC958 S/P DIF interface output).
Quantization accuracy: 16, 20, or 24 bits. For S/P DIF, all the
samples are truncated to the most significant 16 bits.
Sampling Frequencies (Fs) = 16, 22.05, 24, 32, 44.1, and 48 kHz.
Compressed audio data is packed into 16-bit packet and sent to
S/P DIF output.
Outputs two channels of decoded MPEG or Linear PCM audio.
32 bits per sample per channel serial output
Outputs two channels of decoded or formatted MPEG audio or
decoded Linear PCM audio
32 bits per sample per channel serial output; each bit
represented by two binary states
shows a block diagram of the Audio Decoder. The host can
The host must clear the Audio Formatter Start/Stop bit in
Register 356
Mode 0b000 or 0b100 (see
formatter must be stopped before selecting non-formatter
modes and not started unless the mode is changed to
include the formatter.
(page
4-80) before selecting Audio Decoder
Table
10.1). That is, the
(page
4-81).

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