L64105 LSI Logic Corporation, L64105 Datasheet - Page 76
L64105
Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
1.L64105.pdf
(454 pages)
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3-34
Horizontal Filter Scale [7:0]
Horizontal Filter Select bit
Horizontal Pan and Scan Luma/Chroma Word Offset [7:0]
Host Category [7:0]
Host SDRAM Transfer Byte Ordering bit
Host Force Broken Link Mode bit
Host Next GOP/Seq Status bit
Host Overwrite Quantization [1:0]
Host Pc Info [2:0]
Host Pd Value [15:0]
Host Read FIFO Empty bit
Host Read FIFO Full bit
Host Repeat First Field bit
Host SDRAM Read Data [7:0]
Host SDRAM Source Address [18:0]
Host SDRAM Target Address [18:0]
Host SDRAM Write Data [7:0]
Host Search Next GOP/Seq Command bit
Host Top Field First bit
Host Write FIFO Empty bit
Host Write FIFO Full bit
I
IEC - Host Copyright bit
IEC - Host Emphasis [2:0]
IEC - Overwrite Copyright bit
IEC - Overwrite Emphasis bit
Ignore Sequence End bit
Initiate Memory Test bit
Internal Lock Counter State [1:0]
Internal Phase State (1 cycle before) [1:0]
Internal Phase State (2 cycles before) [1:0]
Internal Phase State (3 cycles before) [1:0]
Internal Phase State (current cycle) [1:0]
Internal SDRAM State [2:0]
Intra Q Table bit
Invert Channel Clock bit
Invert LRCLK bit
ITU-R BT.656 Mode bit
Register Summary
4-64
4-63
4-66
4-89
4-40
4-54
4-56
4-88
4-90
4-91
4-38
4-38
4-62
4-41
4-42
4-42
4-41
4-56
4-62
4-38
4-38
4-87
4-87
4-88
4-87
4-55
4-92
4-44
4-45
4-45
4-45
4-45
4-44
4-56
4-84
4-67
4-9
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