L64105 LSI Logic Corporation, L64105 Datasheet - Page 74
L64105
Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
1.L64105.pdf
(454 pages)
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3-32
Audio Sync Code Read Address [19:0]
Audio Sync Error Interrupt bit
Audio Sync Recovery Interrupt bit
Automatic Field Inversion Correction bit
Aux Data FIFO Output [7:0]
Aux Data FIFO Status [1:0]
Aux Data Layer ID [2:0]
Aux/User Data FIFO Ready Interrupt bit
B
B Chroma Frame Store Base Address [15:0]
B Luma Frame Store Base Address [15:0]
Begin Active Video Interrupt bit
Begin Vertical Blank Interrupt bit
Block Transfer Count [15:0]
C
Capture on Audio PES Ready bit
Capture on Audio Sync Code bit
Capture on Beginning of Active Video bit
Capture on DTS Audio bit
Capture on DTS Video bit
Capture on PACK Data Ready bit
Capture on Picture Start Code bit
Capture on Video PES Ready bit
Channel Bypass Enable bit
Channel Pause bit
Channel Request Mode bit
Channel Start/Reset bit
Channel Status bit
Clear Interrupt Pin bit
Clear OSD Palette Counter bit
Clk Out of Sync bit
Concealment Copy Option bit
Context Error Interrupt bit
Control for Programmable Delay Path 1 [1:0]
Control for Programmable Delay Path 2 [1:0]
CrCb 2’s Complement bit
Current Decode Frame [1:0]
Current Display Frame [1:0]
Register Summary
4-31
4-65
4-19
4-17
4-18
4-49
4-49
4-43
4-15
4-14
4-14
4-15
4-15
4-14
4-14
4-15
4-10
4-10
4-11
4-11
4-10
4-59
4-43
4-55
4-43
4-44
4-68
4-53
4-53
4-8
4-3
4-2
4-4
4-5
4-9
4-8
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